Commit Graph

15 Commits

Author SHA1 Message Date
Hui Wang 010dc8af8f ARM: mx5: use generic irq chip pm interface for pm functions on
Two problems exist in the current i.MX5 pm suspend/resume and idle
functions. The first is the current i.MX5 suspend routine will call
tzic_enable_wake(1) to set wake source, this will set all enabled
irq as wake source rather than those wake capable. The second
is i.MX5 idle will call mx5_cpu_lp_set() to prepare enter low power
mode, but it forgets to call wfi instruction to enter this mode.

To fix these two problems, using generic irq chip pm interface and
modify function imx5_idle().

[Tested by Shawn Guo on imx51 babbage board.
 Tested by Hui Wang on imx51 pdk board.]

Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2011-12-25 12:02:28 +08:00
Jason Liu 98de0cbbe2 ARM:i.MX: fix build error in tzic/avic.c
arch/arm/plat-mxc/tzic.c:105: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'tzic_handle_irq'

Signed-off-by: Jason Liu <jason.hui@linaro.org>
2011-11-04 03:54:17 +08:00
Sascha Hauer ca4e419c20 Merge branches 'features/assorted', 'features/imx-pata' and 'features/imx-multi-irq-v2' into imx-features
Conflicts:
	arch/arm/plat-mxc/avic.c
	arch/arm/plat-mxc/include/mach/common.h

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-29 10:40:29 +02:00
Sascha Hauer 58a926008c ARM i.MX tzic: add handle_irq function
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-26 11:40:35 +02:00
Hui Wang 3439a397a8 ARM i.MX avic: convert to use generic irq chip
Convert i.MX avic irq handler to use generic irq chip. This not only
provides a cleanup implementation of irq chip handler, but also
implements suspend/resume interface with the help of generic irq chip
interface.

Change mxc_irq_chip to a new structure mxc_extra_irq to handle fiq
and priority functions.

Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-23 08:32:14 +02:00
Shawn Guo 8b6c44f100 ARM: mxc: convert tzic to use generic irq chip
The patch converts mxc tzic interrupt controller to use generic irq
chip.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-07-07 10:01:07 +02:00
Sascha Hauer fe31ad4159 ARM i.MX tzic: do not depend on MXC_INTERNAL_IRQS
This becomes meaningless in subsequent patches.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-07-07 09:59:59 +02:00
Thomas Gleixner f38c02f3b3 arm: Fold irq_set_chip/irq_set_handler
Use irq_set_chip_and_handler() instead. Converted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:58 +02:00
Thomas Gleixner 6845664a6a arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:47:57 +02:00
Lennert Buytenhek 4d93579f63 ARM: plat-mxc: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2011-01-13 17:19:09 +01:00
Peter Horton cdc3f10630 mx51: support FIQ on TZIC, revised
Add support for FIQ on mx51 TZIC

TZIC changes tested with FIQ audio on an mx51 board

AVIC changes build with mx3_defconfig, not tested

Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-12-14 09:54:37 +01:00
Jason Wang a38b372fc2 mxc/tzic: add base address when accessing TZIC registers
When we call tzic_enable_wake function, the kernel will crash because
of access to an unmapped address. This is because two register
access operations forgot to add base address.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-08-21 12:22:43 +02:00
Uwe Kleine-König 9a763bfbe4 ARM: imx: get rid of mxc_gpio_init
This function is defined once for each imx family and so is in the way
when compiling a kernel for more than one SoC.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-06-24 15:40:40 +02:00
Dinh Nguyen e24798e637 mx5: Add registration of GPIOs for MX5 devices
Register the gpio irqs on Freescale's MX51 Babbage HW.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-04-22 16:53:23 +02:00
Amit Kucheria a003708ad4 mxc: TrustZone interrupt controller (TZIC) for Freescale i.MX5 family
Freescale i.MX51 processor uses a new interrupt controller. Add
driver for TrustZone Interrupt Controller

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
2010-02-09 16:15:26 +02:00