Commit Graph

2 Commits

Author SHA1 Message Date
Dan Williams 7dea1b2006 [ARM] 4494/1: iop13xx: fix up elf_hwcap compile breakage
arch/arm/boot/compressed/misc.o: In function `valid_user_regs':
misc.c:(.text+0x74): undefined reference to `elf_hwcap'

This triggers after the various elf_hwcap cleanups in:
f884b1cf57
d1cbbd6b41

include/asm-arm/arch-iop13xx/uncompress.h calls cpu_relax while spinning on
a register value.  cpu_relax requires processor.h->ptrace.h->hwcap.h

'elf_hwcap' is defined as an extern, but since the uncompressor does not
link against arch/arm/kernel/setup.c 'elf_hwcap' remains undefined.

Fix is to open code the cpu_relax() call as barrier().

Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 09:35:35 +01:00
Dan Williams 285f5fa7e9 [ARM] 3995/1: iop13xx: add iop13xx support
The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a
Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory
controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz
PCI-X interface, a x8 PCI-Express interface, and other peripherals to form
a system-on-a-chip RAID subsystem engine.

The iop342 processor replaces the SAS controller with a second Xscale core
for dual core embedded applications.

The iop341 processor is the single core version of iop342.

This patch supports the two Intel customer reference platforms iq81340mc
for external storage and iq81340sc for direct attach (HBA) development.

The developer's manual is available here:
ftp://download.intel.com/design/iio/docs/31503701.pdf

Changelog:
* removed virtual addresses from resource definitions
* cleaned up some unnecessary #include's

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-12-07 17:20:21 +00:00