Commit Graph

96 Commits

Author SHA1 Message Date
Dima Zavin 11b9369cbb ARM: 6625/1: use memblock memory regions for "System RAM" I/O resources
Do not use memory bank info to request the "system ram" resources as
they do not track holes created by memblock_remove inside
machine's reserve callback. If the removed memory is passed as
platform_device's ioresource, then drivers that call
request_mem_region would fail due to a conflict with the incorrectly
configured system ram resource.

Instead, iterate through the regions of memblock.memory and add
those as "System RAM" resources.

Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-14 22:14:04 +00:00
Alexander Holler 22eeb8f6e0 ARM: 6620/1: Change misleading warning when CONFIG_CMDLINE_FORCE is used
When CONFIG_CMDLINE_FORCE is used, the warning

  Ignoring unrecognised tag 0x54410009

was displayed. Change this to

  Ignoring tag cmdline (using the default kernel command line)

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-12 14:22:25 +00:00
Russell King dec12e62c0 ARM: provide an early platform initialization hook
This allows platforms to hook into the initialization early to setup
things like scheduler clocks, etc.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-24 09:49:52 +00:00
Russell King 8ff1443c54 ARM: simplify early machine init hooks
Rather than storing each machine init hook separately, store a
pointer to the machine description record and dereference this
instead.  This pointer is only available while the init sections
are present, which is not a problem as we only use it from init
code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-24 09:49:51 +00:00
eric miao 521086412e ARM: 6532/1: Allow machine to specify it's own IRQ handlers at run-time
Normally different ARM platform has different way to decode the IRQ
hardware status and demultiplex to the corresponding IRQ handler.
This is highly optimized by macro irq_handler in entry-armv.S, and
each machine defines their own macro to decode the IRQ number.
However, this prevents multiple machine classes to be built into a
single kernel.

By allowing each machine to specify thier own handler, and making
function pointer 'handle_arch_irq' to point to it at run time, this
can be solved. And introduce CONFIG_MULTI_IRQ_HANDLER to allow both
solutions to work.

Comparing with the highly optimized macro of irq_handler, the new
function must be written with care not to lose too much performance.
And the IPI stuff on SMP is expected to move to the provided arch
IRQ handler as well.

The assembly code to invoke handle_arch_irq is optimized by Russell
King.

Signed-off-by: Eric Miao <eric.miao@canonical.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-24 09:47:34 +00:00
Russell King 0385ebc0c9 ARM: move high-usage mostly read variables in setup.c to __read_mostly
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-05 08:39:37 +00:00
Russell King 23beab76b4 Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', 'st-ux' and 'unwind' into devel 2010-10-18 22:34:25 +01:00
Russell King 842eab40b6 ARM: vmlinux.lds: Refer to start of .data using _sdata rather than _data
Use _sdata as the start of the data section, rather than _data.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-08 10:02:24 +01:00
Linus Walleij 5fb31a96e1 ARM: 6431/1: fix isb regression on CPU < v7
The kernel does not compile for my ARM926EJ-S system U300 due to
the isb instruction inserted in generic assember statement from
commit 8925ec4c53, "ARM: 6385/1:
setup: detect aliasing I-cache when D-cache is non-aliasing"
hey the isb is only available when assembling for v7 so let's
use the generic isb() macro from setup.h instead.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-08 09:59:36 +01:00
Will Deacon 8925ec4c53 ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasing
Currently, the Kernel assumes that if a CPU has a non-aliasing D-cache
then the I-cache is also non-aliasing. This may not be true on ARM cores
from v6 onwards, which may have aliasing I-caches but non-aliasing
D-caches.

This patch adds a cpu_has_aliasing_icache function, which is called from
cacheid_init and adds CACHEID_VIPT_I_ALIASING to the cacheid when
appropriate. A utility macro, icache_is_vipt_aliasing(), is also
provided.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-04 20:57:09 +01:00
Russell King f00ec48fad ARM: Allow SMP kernels to boot on UP systems
UP systems do not implement all the instructions that SMP systems have,
so in order to boot a SMP kernel on a UP system, we need to rewrite
parts of the kernel.

Do this using an 'alternatives' scheme, where the kernel code and data
is modified prior to initialization to replace the SMP instructions,
thereby rendering the problematical code ineffectual.  We use the linker
to generate a list of 32-bit word locations and their replacement values,
and run through these replacements when we detect a UP system.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-04 20:23:36 +01:00
Russell King 7b70c4275f Merge branch 'devel-stable' into devel
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/kernel/setup.c
	arch/arm/mm/init.c
2010-07-31 14:20:16 +01:00
Russell King b31fc7af78 Merge branches 'at91', 'ep93xx', 'kexec', 'iop', 'lmb', 'nomadik', 'nuc', 'pl', 'spear' and 'versatile' into devel 2010-07-31 14:19:35 +01:00
Russell King 8d717a52d1 ARM: Convert platform reservations to use LMB rather than bootmem
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-27 08:48:23 +01:00
Russell King 2778f62056 ARM: initial LMB trial
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-27 08:48:22 +01:00
Russell King be37030274 ARM: Remove DISCONTIGMEM support
Everything should now be using sparsemem rather than discontigmem, so
remove the code supporting discontigmem from ARM.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-16 10:57:35 +01:00
Mika Westerberg cea0bb1bc5 ARM: 6122/1: kdump: add support for elfcorehdr parameter
This parameter is used by primary kernel to pass address of vmcore
header to the dump capture kernel.

Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 15:00:53 +01:00
Mika Westerberg 3c57fb43c8 ARM: 6116/1: kdump: reserve memory for crashkernel
Implemented ARM support for command line option
"crashkernel=size@start" which allows user to reserve some memory
for a dump capture kernel.

Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 15:00:51 +01:00
Tony Lindgren f159f4ed55 ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6
The TLS register is only available on ARM1136 r1p0 and later.
Set HWCAP_TLS flags if hardware TLS is available and test for
it if CONFIG_CPU_32v6K is not set for V6.

Note that we set the TLS instruction in __kuser_get_tls
dynamically as suggested by Jamie Lokier <jamie@shareable.org>.

Also the __switch_to code is optimized out in most cases as
suggested by Nicolas Pitre <nico@fluxnic.net>.

Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 14:41:35 +01:00
eric miao 354e6f72d6 ARM: 6197/2: preliminary support for sparse IRQ
So to allow NR_IRQS to be dynamic and platforms to specify the number
of IRQs really needed.

Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 14:41:33 +01:00
Uwe Kleine-König 73a65b3f85 ARM: deprecate support for old way to pass kernel parameters
This was deprecated in 2001 and announced to live on for 5 years.

For now provide a kernel parameter for those who still need it.

Acked-by: Eric Miao <eric.miao@canonical.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-07-07 16:38:36 +02:00
Alexander Holler 92d2040d78 ARM: 5939/1: ARM: Add option CMDLINE_FORCE to force usage of the in-kernel cmdline
Add an option to force usage of the in-kernel cmdline even if the boot
loader passes another command string to the kernel.

Useful if someone cannot or don't want to change the
command-line options of the boot loader but is able to change
the kernel.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-24 20:45:00 +01:00
Linus Torvalds ac0f6f927d Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits)
  ARM: Eliminate decompressor -Dstatic= PIC hack
  ARM: 5958/1: ARM: U300: fix inverted clk round rate
  ARM: 5956/1: misplaced parentheses
  ARM: 5955/1: ep93xx: move timer defines into core.c and document
  ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c
  ARM: 5953/1: ep93xx: fix broken build of clock.c
  ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
  ARM: 5949/1: NUC900 add gpio virtual memory map
  ARM: 5948/1: Enable timer0 to time4 clock support for nuc910
  ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk
  ARM: make_coherent(): fix problems with highpte, part 2
  MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
  ARM: 5945/1: ep93xx: include correct irq.h in core.c
  ARM: 5933/1: amba-pl011: support hardware flow control
  ARM: 5930/1: Add PKMAP area description to memory.txt.
  ARM: 5929/1: Add checks to detect overlap of memory regions.
  ARM: 5928/1: Change type of VMALLOC_END to unsigned long.
  ARM: 5927/1: Make delimiters of DMA area globally visibly.
  ARM: 5926/1: Add "Virtual kernel memory..." printout.
  ARM: 5920/1: OMAP4: Enable L2 Cache
  ...

Fix up trivial conflict in arch/arm/mach-mx25/clock.c
2010-03-01 09:15:15 -08:00
Santosh Shilimkar 6c09f09d44 ARM: 5938/1: ARM: L2: export outer_cache_fns
The 'outer_cache' variable is needed by the outer_inv_range(),
outer_clean_range() and outer_flush_range() functions, which are
declared as inline in asm/cacheflush.h.  Otherwise drivers built
as a loadable module, which access these functions, will have
an undefined symbol.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-18 16:27:39 +00:00
Jeremy Kerr 48ab7e09e0 ARM: 5906/1: arm: change command_line to cmd_line
drivers/of/fdt expects a cmd_line symbol, while arm uses command_line.
Change to the former, so that we can eventually share with the fdt
code.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-15 21:39:50 +00:00
Jeremy Kerr 2b0d8c251b ARM: 5880/1: arm: use generic infrastructure for early params
The ARM setup code includes its own parser for early params, there's
also one in the generic init code.

This patch removes __early_init (and related code) from
arch/arm/kernel/setup.c, and changes users to the generic early_init
macro instead.

The generic macro takes a char * argument, rather than char **, so we
need to update the parser functions a little.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-15 21:39:13 +00:00
Russell King e119bfff1f ARM: Move creation of /proc/cpu out of alignment.c
Always creating this directory avoids other users having to jump
through silly hoops when they want to share this directory.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-15 21:39:12 +00:00
Linus Walleij bc581770cf ARM: 5580/2: ARM TCM (Tightly-Coupled Memory) support v3
This adds the TCM interface to Linux, when active, it will
detect and report TCM memories and sizes early in boot if
present, introduce generic TCM memory handling, provide a
generic TCM memory pool and select TCM memory for the U300
platform.

See the Documentation/arm/tcm.txt for documentation.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-09-15 22:11:05 +01:00
Catalin Marinas b86040a59f Thumb-2: Implementation of the unified start-up and exceptions code
This patch implements the ARM/Thumb-2 unified kernel start-up and
exception handling code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-07-24 12:32:54 +01:00
Russell King 97fb44eb6b Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel
Conflicts:

	arch/arm/mach-at91/gpio.c
2009-03-13 21:44:51 +00:00
Catalin Marinas b57ee99fab [ARM] 5417/1: Set the correct cacheid for ARMv6 CPUs with ARMv7 style MMU
The cacheid_init() function assumes that if cpu_architecture() returns
7, the caches are VIPT_NONALIASING. The cpu_architecture() function
returns the version of the supported MMU features (e.g. TEX remapping)
but it doesn't make any assumptions about the cache type. The patch adds
the checking of the Cache Type Register for the ARMv7 format.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-03-03 12:11:26 +00:00
Catalin Marinas bff595c15c [ARM] 5383/2: unwind: Add core support for ARM stack unwinding
This patch adds the main functionality for parsing the stack unwinding
information generated by the ARM EABI toolchains. The unwinding
information consists of an index with a pair of words per function and a
table with unwinding instructions. For more information, see "Exception
Handling ABI for the ARM Architecture" at:

http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-19 11:26:24 +00:00
Catalin Marinas 7279dc3e91 [ARM] 5388/1: Add hwcap bits for VFPv3 and VFPv3D16
The VFPv3D16 is a VFPv3 CPU configuration where only 16 double registers
are present, as the VFPv2 configuration. This patch adds the
corresponding hwcap bits so that applications or debuggers have more
information about the supported features.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-12 10:59:44 +00:00
Russell King 37efe6427d [ARM] use asm/sections.h
Update to use the asm/sections.h header rather than declaring these
symbols ourselves.  Change __data_start to _data to conform with the
naming found within asm/sections.h.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-12-01 11:53:07 +00:00
Russell King 7ef4de17cc Merge branch 'highmem' into devel
Conflicts:

	arch/arm/mach-clps7500/include/mach/memory.h
2008-11-28 15:39:02 +00:00
Nicolas Pitre 4b5f32cee0 [ARM] rationalize memory configuration code some more
Currently there are two instances of struct meminfo: one in
kernel/setup.c marked __initdata, and another in mm/init.c with
permanent storage.  Let's keep only the later to directly populate
the permanent version from arm_add_memory().

Also move common validation tests between the MMU and non-MMU cases
into arm_add_memory() to remove some duplication.  Protection against
overflowing the membank array is also moved in there in order to cover
the kernel cmdline parsing path as well.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-28 15:36:44 +00:00
Catalin Marinas 2bedbdf414 Add HWCAP_NEON to the ARM hwcap.h file
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-11-06 13:23:07 +00:00
Catalin Marinas 4369ae16ee Add "thumbee" to the hwcap_str array
This part was missed in the initial patch adding ThumbEE support.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-11-06 13:23:06 +00:00
Nicolas Pitre 3319f5e51a [ARM] 5274/1: simplify request_standard_resources()
There is no point converting memory bank addresses from physical to
virtual just to convert them back to physical addresses.  Furthermore
this isn't "right" for highmem even if in this case the end result is
the correct one.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-02 22:46:21 +01:00
Russell King 6c5da7aced [ARM] mm: move vmalloc= parsing to arch/arm/mm/mmu.c
There's no point scattering this around the tree, the parsing
of the parameter might as well live beside the code which uses
it.  That also means we can make vmalloc_reserve a static
variable.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30 21:34:16 +01:00
Russell King 2b4ae1f1d2 [ARM] Print details relevant to how we handle the cache
This replaces the original cache type decoding printks.  We now
indicate how we're treating the cache which we found, rather
than what we found.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-25 15:39:20 +01:00
Russell King c0e9587841 [ARM] Introduce new bitmask based cache type macros
Rather than trying to (inaccurately) decode the cache type from the
registers each time we need to decide what type of cache we have,
use a bitmask initialized early during boot.

Since the setup is a one-off initialization, we can be a little more
clever and take account of the CPU architecture as well.

Note that we continue to achieve the compactness on optimised kernels
by forcing tests to always-false or always-true as appropriate, thereby
allowing the compiler to do build-time code elimination.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-25 15:35:28 +01:00
Russell King 90f1e08478 [ARM] Remove cache type printks
The cache type register found in ARMv5 and later CPUs changes format
and meaning depending on the CPU architecture version.  Currently,
this code:
a) doesn't work for everything - Xscale's are identified as
   'unknown 5'.
b) is not able to tell whether the caches are VIVT or VIPT from the
   cache type.
c) prints rubbish on some ARMv6 and ARMv7+ CPUs.

The two solutions to this are:
1. Add yet more code to decode and print the various different register
   formats.
2. Remove the code altogther.

The code only exists to decode and print the cache parameters.
Increasing the complexity of it just for the sake of a few prinks
isn't worth it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-25 14:45:02 +01:00
Russell King 5ed5fdf50c [ARM] clean up a load of old declarations
... some of which are now in linux/*.h headers.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-06 11:23:30 +01:00
Russell King 012d1f4af1 [ARM] move initrd code from kernel/setup.c to mm/init.c
This quietens some sparse warnings about phys_initrd_start and
phys_initrd_size.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-06 10:57:03 +01:00
Russell King 09d9bae064 [ARM] sparse: fix several warnings
arch/arm/kernel/process.c:270:6: warning: symbol 'show_fpregs' was not declared. Should it be static?

This function isn't used, so can be removed.

arch/arm/kernel/setup.c:532:9: warning: symbol 'len' shadows an earlier one
arch/arm/kernel/setup.c:524:6: originally declared here

A function containing two 'len's.

arch/arm/mm/fault-armv.c:188:13: warning: symbol 'check_writebuffer_bugs' was not declared. Should it be static?
arch/arm/mm/mmap.c:122:5: warning: symbol 'valid_phys_addr_range' was not declared. Should it be static?
arch/arm/mm/mmap.c:137:5: warning: symbol 'valid_mmap_phys_addr_range' was not declared. Should it be static?

Missing includes.

arch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer
arch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces)

Sillies.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-05 14:11:24 +01:00
Russell King 46097c7dd8 [ARM] cachetype: move definitions to separate header
Rather than pollute asm/cacheflush.h with the cache type definitions,
move them to asm/cachetype.h, and include this new header where
necessary.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-01 12:06:24 +01:00
Russell King 0ba8b9b273 [ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h
there.  Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-01 12:06:23 +01:00
Lennert Buytenhek 60296c71f6 [ARM] prevent crashing when too much RAM installed
This patch will truncate and/or ignore memory banks if their kernel
direct mappings would (partially) overlap with the vmalloc area or
the mappings between the vmalloc area and the address space top, to
prevent crashing during early boot if there happens to be more RAM
installed than we are expecting.

Since the start of the vmalloc area is not at a fixed address (but
the vmalloc end address is, via the per-platform VMALLOC_END define),
a default area of 128M is reserved for vmalloc mappings, which can
be shrunk or enlarged by passing an appropriate vmalloc= command line
option as it is done on x86.

On a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe000000,
two 512M RAM banks and vmalloc=128M (the default), this patch gives:

	Truncating RAM at 20000000-3fffffff to -35ffffff (vmalloc region overlap).
	Memory: 512MB 352MB = 864MB total

On a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe800000,
two 256M RAM banks and vmalloc=768M, this patch gives:

	Truncating RAM at 00000000-0fffffff to -0e7fffff (vmalloc region overlap).
	Ignoring RAM at 10000000-1fffffff (vmalloc region overlap).

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Riku Voipio <riku.voipio@iki.fi>
2008-08-09 15:38:15 +02:00
Jason Wessel 5cbad0ebf4 kgdb: support for ARCH=arm
This patch adds the ARCH=arm specific a kgdb backend, originally
written by Deepak Saxena <dsaxena@plexity.net> and George Davis
<gdavis@mvista.com>.  Geoff Levand <geoffrey.levand@am.sony.com>,
Nicolas Pitre, Manish Lachwani, and Jason Wessel have contributed
various fixups here as well.

The KGDB patch makes one change to the core ARM architecture such that
the traps are initialized early for use with the debugger or other
subsystems.

[ mingo@elte.hu: small cleanups. ]
[ ben-linux@fluff.org: fixed early_trap_init ]

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Acked-by: Deepak Saxena <dsaxena@plexity.net>
2008-07-23 11:30:15 -05:00