8f446a7a06
- A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2 RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1 BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad 4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3 0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS HP4M96LxLHJlLGCxhEme =ck7M -----END PGP SIGNATURE----- Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc driver specific changes from Olof Johansson: - A long-coming conversion of various platforms to a common LED infrastructure - AT91 is moved over to use the newer MCI driver for MMC - Pincontrol conversions for samsung platforms - DT bindings for gscaler on samsung - i2c driver fixes for tegra, acked by i2c maintainer Fix up conflicts as per Olof. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: bus: omap_l3: use resources instead of hardcoded irqs pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa drivers: bus: Move the OMAP interconnect driver to drivers/bus/ i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used ...
395 lines
11 KiB
C
395 lines
11 KiB
C
/*
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* linux/arch/arm/mach-realview/realview_pb1176.c
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*
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* Copyright (C) 2008 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl061.h>
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#include <linux/amba/mmci.h>
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#include <linux/amba/pl022.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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#include <linux/io.h>
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#include <linux/platform_data/clk-realview.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/pgtable.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/board-pb1176.h>
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#include <mach/irqs.h>
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#include "core.h"
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static struct map_desc realview_pb1176_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
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.length = SZ_8K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#endif
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};
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static void __init realview_pb1176_map_io(void)
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{
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iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
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}
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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.bus_id = 0,
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.enable_dma = 0,
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.num_chipselect = 1,
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};
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/*
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* RealView PB1176 AMBA devices
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*/
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#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
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#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
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#define AACI_IRQ { IRQ_PB1176_AACI }
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#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
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#define KMI0_IRQ { IRQ_PB1176_KMI0 }
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#define KMI1_IRQ { IRQ_PB1176_KMI1 }
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#define PB1176_SMC_IRQ { }
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#define MPMC_IRQ { }
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#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
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#define SCTL_IRQ { }
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#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
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#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
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#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
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#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
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#define SCI_IRQ { IRQ_PB1176_SCI }
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#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
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#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
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#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
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#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
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#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
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#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
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/* FPGA Primecells */
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APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
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APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
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APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
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APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
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APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
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/* DevChip Primecells */
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AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
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AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
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APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
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APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
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APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
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APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
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APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
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APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
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APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
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APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
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APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
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APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
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APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
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AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
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static struct amba_device *amba_devs[] __initdata = {
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&uart0_device,
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&uart1_device,
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&uart2_device,
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&uart3_device,
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&uart4_device,
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&smc_device,
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&clcd_device,
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&sctl_device,
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&wdog_device,
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&gpio0_device,
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&gpio1_device,
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&gpio2_device,
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&rtc_device,
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&sci0_device,
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&ssp0_device,
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&aaci_device,
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&mmc0_device,
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&kmi0_device,
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&kmi1_device,
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};
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/*
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* RealView PB1176 platform devices
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*/
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static struct resource realview_pb1176_flash_resources[] = {
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{
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.start = REALVIEW_PB1176_FLASH_BASE,
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.end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
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{
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.start = REALVIEW_PB1176_SEC_FLASH_BASE,
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.end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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#endif
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};
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static struct physmap_flash_data pb1176_rom_pdata = {
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.probe_type = "map_rom",
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.width = 4,
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.nr_parts = 0,
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};
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static struct resource pb1176_rom_resources[] = {
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/*
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* This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
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* The reference manual states that this is actually a pseudo-ROM
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* programmed in NVRAM.
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*/
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{
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.start = REALVIEW_DC1176_ROM_BASE,
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.end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device pb1176_rom_device = {
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.name = "physmap-flash",
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.id = -1,
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.num_resources = ARRAY_SIZE(pb1176_rom_resources),
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.resource = pb1176_rom_resources,
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.dev = {
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.platform_data = &pb1176_rom_pdata,
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},
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};
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static struct resource realview_pb1176_smsc911x_resources[] = {
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[0] = {
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.start = REALVIEW_PB1176_ETH_BASE,
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.end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PB1176_ETH,
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.end = IRQ_PB1176_ETH,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource realview_pb1176_isp1761_resources[] = {
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[0] = {
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.start = REALVIEW_PB1176_USB_BASE,
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.end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PB1176_USB,
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.end = IRQ_PB1176_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource pmu_resource = {
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.start = IRQ_DC1176_CORE_PMU,
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.end = IRQ_DC1176_CORE_PMU,
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.flags = IORESOURCE_IRQ,
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};
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static struct platform_device pmu_device = {
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.name = "arm-pmu",
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.id = -1,
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.num_resources = 1,
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.resource = &pmu_resource,
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};
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static struct resource char_lcd_resources[] = {
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{
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.start = REALVIEW_CHAR_LCD_BASE,
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.end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_PB1176_CHARLCD,
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.end = IRQ_PB1176_CHARLCD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device char_lcd_device = {
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.name = "arm-charlcd",
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.id = -1,
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.num_resources = ARRAY_SIZE(char_lcd_resources),
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.resource = char_lcd_resources,
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};
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static void __init gic_init_irq(void)
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{
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/* ARM1176 DevChip GIC, primary */
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gic_init(0, IRQ_DC1176_GIC_START,
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__io_address(REALVIEW_DC1176_GIC_DIST_BASE),
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__io_address(REALVIEW_DC1176_GIC_CPU_BASE));
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/* board GIC, secondary */
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gic_init(1, IRQ_PB1176_GIC_START,
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__io_address(REALVIEW_PB1176_GIC_DIST_BASE),
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__io_address(REALVIEW_PB1176_GIC_CPU_BASE));
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gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
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}
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static void __init realview_pb1176_timer_init(void)
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{
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timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
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timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
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timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
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timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
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realview_clk_init(__io_address(REALVIEW_SYS_BASE), true);
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realview_timer_init(IRQ_DC1176_TIMER0);
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}
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static struct sys_timer realview_pb1176_timer = {
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.init = realview_pb1176_timer_init,
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};
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static void realview_pb1176_restart(char mode, const char *cmd)
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{
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void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
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void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
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__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
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__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
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dsb();
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}
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static void realview_pb1176_fixup(struct tag *tags, char **from,
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struct meminfo *meminfo)
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{
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/*
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* RealView PB1176 only has 128MB of RAM mapped at 0.
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*/
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meminfo->bank[0].start = 0;
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meminfo->bank[0].size = SZ_128M;
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meminfo->nr_banks = 1;
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}
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static void __init realview_pb1176_init(void)
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{
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int i;
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#ifdef CONFIG_CACHE_L2X0
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/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
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l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
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#endif
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realview_flash_register(realview_pb1176_flash_resources,
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ARRAY_SIZE(realview_pb1176_flash_resources));
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platform_device_register(&pb1176_rom_device);
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realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
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platform_device_register(&realview_i2c_device);
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realview_usb_register(realview_pb1176_isp1761_resources);
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platform_device_register(&pmu_device);
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platform_device_register(&char_lcd_device);
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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}
|
|
|
|
MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
|
|
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
|
.atag_offset = 0x100,
|
|
.fixup = realview_pb1176_fixup,
|
|
.map_io = realview_pb1176_map_io,
|
|
.init_early = realview_init_early,
|
|
.init_irq = gic_init_irq,
|
|
.timer = &realview_pb1176_timer,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = realview_pb1176_init,
|
|
#ifdef CONFIG_ZONE_DMA
|
|
.dma_zone_size = SZ_256M,
|
|
#endif
|
|
.restart = realview_pb1176_restart,
|
|
MACHINE_END
|