d94589900d
commit 3ac0f4526d upstream.
In an effort to clarify and simplify the annotation of assembly functions
in the kernel new macros have been introduced. These replace ENTRY and
ENDPROC and also add a new annotation for static functions which previously
had no ENTRY equivalent. Update the annotations in the library code to the
new macros.
Signed-off-by: Mark Brown <broonie@kernel.org>
[will: Use SYM_FUNC_START_WEAK_PI]
Signed-off-by: Will Deacon <will@kernel.org>
Cc: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
102 lines
1.9 KiB
ArmAsm
102 lines
1.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Accelerated CRC32(C) using AArch64 CRC instructions
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*
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* Copyright (C) 2016 - 2018 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <linux/linkage.h>
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#include <asm/alternative.h>
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#include <asm/assembler.h>
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.cpu generic+crc
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.macro __crc32, c
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cmp x2, #16
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b.lt 8f // less than 16 bytes
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and x7, x2, #0x1f
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and x2, x2, #~0x1f
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cbz x7, 32f // multiple of 32 bytes
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and x8, x7, #0xf
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ldp x3, x4, [x1]
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add x8, x8, x1
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add x1, x1, x7
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ldp x5, x6, [x8]
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CPU_BE( rev x3, x3 )
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CPU_BE( rev x4, x4 )
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CPU_BE( rev x5, x5 )
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CPU_BE( rev x6, x6 )
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tst x7, #8
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crc32\c\()x w8, w0, x3
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csel x3, x3, x4, eq
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csel w0, w0, w8, eq
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tst x7, #4
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lsr x4, x3, #32
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crc32\c\()w w8, w0, w3
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csel x3, x3, x4, eq
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csel w0, w0, w8, eq
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tst x7, #2
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lsr w4, w3, #16
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crc32\c\()h w8, w0, w3
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csel w3, w3, w4, eq
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csel w0, w0, w8, eq
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tst x7, #1
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crc32\c\()b w8, w0, w3
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csel w0, w0, w8, eq
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tst x7, #16
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crc32\c\()x w8, w0, x5
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crc32\c\()x w8, w8, x6
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csel w0, w0, w8, eq
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cbz x2, 0f
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32: ldp x3, x4, [x1], #32
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sub x2, x2, #32
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ldp x5, x6, [x1, #-16]
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CPU_BE( rev x3, x3 )
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CPU_BE( rev x4, x4 )
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CPU_BE( rev x5, x5 )
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CPU_BE( rev x6, x6 )
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crc32\c\()x w0, w0, x3
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crc32\c\()x w0, w0, x4
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crc32\c\()x w0, w0, x5
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crc32\c\()x w0, w0, x6
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cbnz x2, 32b
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0: ret
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8: tbz x2, #3, 4f
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ldr x3, [x1], #8
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CPU_BE( rev x3, x3 )
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crc32\c\()x w0, w0, x3
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4: tbz x2, #2, 2f
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ldr w3, [x1], #4
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CPU_BE( rev w3, w3 )
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crc32\c\()w w0, w0, w3
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2: tbz x2, #1, 1f
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ldrh w3, [x1], #2
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CPU_BE( rev16 w3, w3 )
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crc32\c\()h w0, w0, w3
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1: tbz x2, #0, 0f
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ldrb w3, [x1]
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crc32\c\()b w0, w0, w3
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0: ret
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.endm
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.align 5
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SYM_FUNC_START(crc32_le)
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alternative_if_not ARM64_HAS_CRC32
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b crc32_le_base
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alternative_else_nop_endif
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__crc32
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SYM_FUNC_END(crc32_le)
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.align 5
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SYM_FUNC_START(__crc32c_le)
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alternative_if_not ARM64_HAS_CRC32
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b __crc32c_le_base
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alternative_else_nop_endif
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__crc32 c
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SYM_FUNC_END(__crc32c_le)
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