2011-06-01 09:05:13 +02:00
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/*
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* Virtio PCI Bindings
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*
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* Copyright IBM, Corp. 2007
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* Copyright (c) 2009 CodeSourcery
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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* Paul Brook <paul@codesourcery.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef QEMU_VIRTIO_PCI_H
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#define QEMU_VIRTIO_PCI_H
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2013-01-14 22:52:02 +01:00
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#include "hw/pci/msi.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/virtio/virtio-bus.h"
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2020-09-03 22:43:22 +02:00
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#include "qom/object.h"
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2016-10-28 10:33:25 +02:00
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2013-01-15 00:08:04 +01:00
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2013-01-15 00:08:03 +01:00
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/* virtio-pci-bus */
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typedef struct VirtioBusState VirtioPCIBusState;
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typedef struct VirtioBusClass VirtioPCIBusClass;
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#define TYPE_VIRTIO_PCI_BUS "virtio-pci-bus"
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2020-08-31 23:07:33 +02:00
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DECLARE_OBJ_CHECKERS(VirtioPCIBusState, VirtioPCIBusClass,
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VIRTIO_PCI_BUS, TYPE_VIRTIO_PCI_BUS)
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2011-06-01 09:05:13 +02:00
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2016-02-10 14:31:13 +01:00
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enum {
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VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT,
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VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT,
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VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT,
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VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT,
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VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT,
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2016-09-07 17:02:25 +02:00
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VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT,
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2016-12-30 11:09:15 +01:00
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VIRTIO_PCI_FLAG_ATS_BIT,
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2017-02-20 21:43:11 +01:00
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VIRTIO_PCI_FLAG_INIT_DEVERR_BIT,
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2017-02-20 21:43:12 +01:00
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VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT,
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2017-02-20 21:43:13 +01:00
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VIRTIO_PCI_FLAG_INIT_PM_BIT,
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2019-08-20 18:30:05 +02:00
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VIRTIO_PCI_FLAG_INIT_FLR_BIT,
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2020-12-03 12:07:13 +01:00
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VIRTIO_PCI_FLAG_AER_BIT,
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2021-04-06 06:03:30 +02:00
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VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT,
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2016-02-10 14:31:13 +01:00
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};
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2014-10-14 18:40:06 +02:00
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/* Need to activate work-arounds for buggy guests at vmstate load. */
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#define VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION \
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(1 << VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT)
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2011-10-12 15:41:23 +02:00
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/* Performance improves when virtqueue kick processing is decoupled from the
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* vcpu thread using ioeventfd for some devices. */
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#define VIRTIO_PCI_FLAG_USE_IOEVENTFD (1 << VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT)
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2015-06-04 12:34:26 +02:00
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/* virtio version flags */
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2015-11-10 12:41:29 +01:00
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#define VIRTIO_PCI_FLAG_DISABLE_PCIE (1 << VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT)
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2015-06-04 12:34:26 +02:00
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2015-11-06 09:02:44 +01:00
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/* migrate extra state */
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#define VIRTIO_PCI_FLAG_MIGRATE_EXTRA (1 << VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT)
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2015-11-06 09:02:48 +01:00
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/* have pio notification for modern device ? */
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#define VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY \
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(1 << VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT)
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2016-09-07 17:02:25 +02:00
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/* page per vq flag to be used by split drivers within guests */
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#define VIRTIO_PCI_FLAG_PAGE_PER_VQ \
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(1 << VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT)
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2016-12-30 11:09:15 +01:00
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/* address space translation service */
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#define VIRTIO_PCI_FLAG_ATS (1 << VIRTIO_PCI_FLAG_ATS_BIT)
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2017-02-20 21:43:11 +01:00
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/* Init error enabling flags */
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#define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT)
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2017-02-20 21:43:12 +01:00
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/* Init Link Control register */
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#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT)
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2017-02-20 21:43:13 +01:00
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/* Init Power Management */
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#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT)
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2019-08-20 18:30:05 +02:00
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/* Init Function Level Reset capability */
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#define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
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2020-12-03 12:07:13 +01:00
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/* Advanced Error Reporting capability */
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#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)
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2021-04-06 06:03:30 +02:00
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/* Page Aligned Address space Translation Service */
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#define VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED \
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(1 << VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT)
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2012-05-17 15:32:39 +02:00
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typedef struct {
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2012-12-20 23:27:54 +01:00
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MSIMessage msg;
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2012-05-17 15:32:39 +02:00
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int virq;
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unsigned int users;
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} VirtIOIRQFD;
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2013-01-15 00:08:04 +01:00
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/*
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* virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
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*/
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#define TYPE_VIRTIO_PCI "virtio-pci"
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2020-09-16 20:25:18 +02:00
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OBJECT_DECLARE_TYPE(VirtIOPCIProxy, VirtioPCIClass, VIRTIO_PCI)
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2013-01-15 00:08:04 +01:00
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2020-09-03 22:43:22 +02:00
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struct VirtioPCIClass {
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2013-01-15 00:08:04 +01:00
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PCIDeviceClass parent_class;
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2015-12-02 18:49:07 +01:00
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DeviceRealize parent_dc_realize;
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2015-02-27 14:52:14 +01:00
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void (*realize)(VirtIOPCIProxy *vpci_dev, Error **errp);
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2020-09-03 22:43:22 +02:00
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};
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2013-01-15 00:08:04 +01:00
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2015-06-04 12:34:33 +02:00
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typedef struct VirtIOPCIRegion {
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MemoryRegion mr;
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2015-06-04 12:34:35 +02:00
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uint32_t offset;
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2015-06-04 12:34:39 +02:00
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uint32_t size;
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2015-06-04 12:34:37 +02:00
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uint32_t type;
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2015-06-04 12:34:33 +02:00
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} VirtIOPCIRegion;
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2015-11-06 09:02:44 +01:00
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typedef struct VirtIOPCIQueue {
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uint16_t num;
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bool enabled;
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uint32_t desc[2];
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uint32_t avail[2];
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uint32_t used[2];
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} VirtIOPCIQueue;
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2013-01-15 00:08:04 +01:00
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struct VirtIOPCIProxy {
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2011-06-01 09:05:13 +02:00
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PCIDevice pci_dev;
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2011-08-08 15:09:13 +02:00
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MemoryRegion bar;
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2017-10-09 05:19:41 +02:00
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union {
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struct {
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VirtIOPCIRegion common;
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VirtIOPCIRegion isr;
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VirtIOPCIRegion device;
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VirtIOPCIRegion notify;
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VirtIOPCIRegion notify_pio;
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};
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VirtIOPCIRegion regs[5];
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};
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2015-06-04 12:34:22 +02:00
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MemoryRegion modern_bar;
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2015-11-06 09:02:48 +01:00
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MemoryRegion io_bar;
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2016-09-29 06:04:40 +02:00
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uint32_t legacy_io_bar_idx;
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uint32_t msix_bar_idx;
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uint32_t modern_io_bar_idx;
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uint32_t modern_mem_bar_idx;
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2015-07-02 14:59:49 +02:00
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int config_cap;
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2011-06-01 09:05:13 +02:00
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uint32_t flags;
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2016-07-20 17:28:21 +02:00
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bool disable_modern;
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2016-12-14 17:30:35 +01:00
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bool ignore_backend_features;
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2016-07-20 17:28:21 +02:00
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OnOffAuto disable_legacy;
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2011-06-01 09:05:13 +02:00
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uint32_t class_code;
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uint32_t nvectors;
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2015-06-04 12:34:22 +02:00
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uint32_t dfselect;
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uint32_t gfselect;
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uint32_t guest_features[2];
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2015-11-06 09:02:44 +01:00
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VirtIOPCIQueue vqs[VIRTIO_QUEUE_MAX];
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2015-06-04 12:34:22 +02:00
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2012-05-17 15:32:39 +02:00
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VirtIOIRQFD *vector_irqfd;
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2012-12-20 13:28:58 +01:00
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int nvqs_with_notifiers;
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2013-01-15 00:08:04 +01:00
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VirtioBusState bus;
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};
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2011-06-01 09:05:13 +02:00
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2016-07-20 17:28:21 +02:00
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static inline bool virtio_pci_modern(VirtIOPCIProxy *proxy)
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{
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2019-07-29 18:29:03 +02:00
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return !proxy->disable_modern;
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2016-07-20 17:28:21 +02:00
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}
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static inline bool virtio_pci_legacy(VirtIOPCIProxy *proxy)
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{
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2019-07-29 18:29:03 +02:00
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return proxy->disable_legacy == ON_OFF_AUTO_OFF;
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2016-07-20 17:28:21 +02:00
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}
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2019-07-29 18:29:03 +02:00
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static inline void virtio_pci_force_virtio_1(VirtIOPCIProxy *proxy)
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2016-07-20 17:28:21 +02:00
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{
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2019-07-29 18:29:03 +02:00
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proxy->disable_modern = false;
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proxy->disable_legacy = ON_OFF_AUTO_ON;
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2016-07-20 17:28:21 +02:00
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}
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2013-03-21 15:15:15 +01:00
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2016-09-13 15:30:30 +02:00
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static inline void virtio_pci_disable_modern(VirtIOPCIProxy *proxy)
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{
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2019-07-29 18:29:03 +02:00
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proxy->disable_modern = true;
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2016-09-13 15:30:30 +02:00
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}
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2015-06-04 12:34:41 +02:00
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/*
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* virtio-input-pci: This extends VirtioPCIProxy.
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*/
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#define TYPE_VIRTIO_INPUT_PCI "virtio-input-pci"
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2015-06-04 12:34:42 +02:00
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2011-06-14 16:51:11 +02:00
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/* Virtio ABI version, if we increment this, we break the guest driver. */
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#define VIRTIO_PCI_ABI_VERSION 0
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2018-12-05 20:57:03 +01:00
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/* Input for virtio_pci_types_register() */
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typedef struct VirtioPCIDeviceTypeInfo {
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/*
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* Common base class for the subclasses below.
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*
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* Required only if transitional_name or non_transitional_name is set.
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*
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* We need a separate base type instead of making all types
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* inherit from generic_name for two reasons:
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* 1) generic_name implements INTERFACE_PCIE_DEVICE, but
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* transitional_name does not.
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* 2) generic_name has the "disable-legacy" and "disable-modern"
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* properties, transitional_name and non_transitional name don't.
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*/
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const char *base_name;
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/*
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* Generic device type. Optional.
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*
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* Supports both transitional and non-transitional modes,
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* using the disable-legacy and disable-modern properties.
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* If disable-legacy=auto, (non-)transitional mode is selected
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* depending on the bus where the device is plugged.
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*
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* Implements both INTERFACE_PCIE_DEVICE and INTERFACE_CONVENTIONAL_PCI_DEVICE,
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* but PCI Express is supported only in non-transitional mode.
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*
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* The only type implemented by QEMU 3.1 and older.
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*/
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const char *generic_name;
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/*
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* The transitional device type. Optional.
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*
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* Implements both INTERFACE_PCIE_DEVICE and INTERFACE_CONVENTIONAL_PCI_DEVICE.
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*/
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const char *transitional_name;
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/*
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* The non-transitional device type. Optional.
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*
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* Implements INTERFACE_CONVENTIONAL_PCI_DEVICE only.
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*/
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const char *non_transitional_name;
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/* Parent type. If NULL, TYPE_VIRTIO_PCI is used */
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const char *parent;
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/* Same as TypeInfo fields: */
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size_t instance_size;
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2019-03-07 09:02:42 +01:00
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size_t class_size;
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2018-12-05 20:57:03 +01:00
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void (*instance_init)(Object *obj);
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void (*class_init)(ObjectClass *klass, void *data);
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2019-06-19 11:49:02 +02:00
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InterfaceInfo *interfaces;
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2018-12-05 20:57:03 +01:00
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} VirtioPCIDeviceTypeInfo;
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/* Register virtio-pci type(s). @t must be static. */
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void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t);
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2020-08-18 16:33:44 +02:00
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/**
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* virtio_pci_optimal_num_queues:
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* @fixed_queues: number of queues that are always present
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*
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* Returns: The optimal number of queues for a multi-queue device, excluding
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* @fixed_queues.
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*/
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unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues);
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2011-06-01 09:05:13 +02:00
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#endif
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