2009-08-28 15:28:13 +02:00
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/*
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* QEMU PIIX4 PCI Bridge Emulation
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 19:17:03 +01:00
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#include "qemu/osdep.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/hw.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/i386/pc.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/pci/pci.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/isa/isa.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/sysbus.h"
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2009-08-28 15:28:13 +02:00
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PCIDevice *piix4_dev;
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2010-12-02 16:26:56 +01:00
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typedef struct PIIX4State {
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PCIDevice dev;
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} PIIX4State;
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2015-05-13 02:43:24 +02:00
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#define TYPE_PIIX4_PCI_DEVICE "PIIX4"
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#define PIIX4_PCI_DEVICE(obj) \
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OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE)
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2009-08-28 15:28:13 +02:00
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static void piix4_reset(void *opaque)
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{
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2010-12-02 16:26:56 +01:00
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PIIX4State *d = opaque;
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uint8_t *pci_conf = d->dev.config;
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2009-08-28 15:28:13 +02:00
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pci_conf[0x04] = 0x07; // master, memory and I/O
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pci_conf[0x05] = 0x00;
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pci_conf[0x06] = 0x00;
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pci_conf[0x07] = 0x02; // PCI_status_devsel_medium
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pci_conf[0x4c] = 0x4d;
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pci_conf[0x4e] = 0x03;
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pci_conf[0x4f] = 0x00;
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pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10
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pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10
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pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11
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pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11
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pci_conf[0x69] = 0x02;
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pci_conf[0x70] = 0x80;
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pci_conf[0x76] = 0x0c;
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pci_conf[0x77] = 0x0c;
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pci_conf[0x78] = 0x02;
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pci_conf[0x79] = 0x00;
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pci_conf[0x80] = 0x00;
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pci_conf[0x82] = 0x00;
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pci_conf[0xa0] = 0x08;
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pci_conf[0xa2] = 0x00;
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pci_conf[0xa3] = 0x00;
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pci_conf[0xa4] = 0x00;
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pci_conf[0xa5] = 0x00;
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pci_conf[0xa6] = 0x00;
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pci_conf[0xa7] = 0x00;
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pci_conf[0xa8] = 0x0f;
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pci_conf[0xaa] = 0x00;
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pci_conf[0xab] = 0x00;
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pci_conf[0xac] = 0x00;
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pci_conf[0xae] = 0x00;
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}
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2010-12-02 16:59:33 +01:00
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static const VMStateDescription vmstate_piix4 = {
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.name = "PIIX4",
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.version_id = 2,
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.minimum_version_id = 2,
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2014-04-16 15:32:32 +02:00
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.fields = (VMStateField[]) {
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2010-12-02 16:59:33 +01:00
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VMSTATE_PCI_DEVICE(dev, PIIX4State),
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VMSTATE_END_OF_LIST()
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}
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};
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2009-08-28 15:28:13 +02:00
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2015-01-19 15:52:30 +01:00
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static void piix4_realize(PCIDevice *dev, Error **errp)
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2009-08-28 15:28:13 +02:00
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{
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2015-05-13 02:43:24 +02:00
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PIIX4State *d = PIIX4_PCI_DEVICE(dev);
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2009-08-28 15:28:13 +02:00
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isa: Clean up error handling around isa_bus_new()
We can have at most one ISA bus. If you try to create another one,
isa_bus_new() complains to stderr and returns null.
isa_bus_new() is called in two contexts, machine's init() and device's
realize() methods. Since complaining to stderr is not proper in the
latter context, convert isa_bus_new() to Error.
Machine's init():
* mips_jazz_init(), called from the init() methods of machines
"magnum" and "pica"
* mips_r4k_init(), the init() method of machine "mips"
* pc_init1() called from the init() methods of non-q35 PC machines
* typhoon_init(), called from clipper_init(), the init() method of
machine "clipper"
These callers always create the first ISA bus, hence isa_bus_new()
can't fail. Simply pass &error_abort.
Device's realize():
* i82378_realize(), of PCI device "i82378"
* ich9_lpc_realize(), of PCI device "ICH9-LPC"
* pci_ebus_realize(), of PCI device "ebus"
* piix3_realize(), of PCI device "pci-piix3", abstract parent of
"PIIX3" and "PIIX3-xen"
* piix4_realize(), of PCI device "PIIX4"
* vt82c686b_realize(), of PCI device "VT82C686B"
Propagate the error. Note that these devices are typically created
only by machine init() methods with qdev_init_nofail() or similar. If
we screwed up and created an ISA bus before that call, we now give up
right away. Before, we'd hobble on, and typically die in
isa_bus_irqs(). Similar if someone finds a way to hot-plug one of
these critters.
Cc: Richard Henderson <rth@twiddle.net>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: "Hervé Poussineau" <hpoussin@reactos.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Markus Armbruster <armbru@pond.sub.org>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <1450370121-5768-11-git-send-email-armbru@redhat.com>
2015-12-17 17:35:18 +01:00
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if (!isa_bus_new(DEVICE(d), pci_address_space(dev),
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pci_address_space_io(dev), errp)) {
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return;
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}
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2010-12-02 16:26:56 +01:00
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piix4_dev = &d->dev;
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2009-08-28 15:28:13 +02:00
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qemu_register_reset(piix4_reset, d);
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}
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2011-12-15 22:09:58 +01:00
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int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
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2009-08-28 15:28:13 +02:00
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{
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PCIDevice *d;
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2010-06-23 09:15:31 +02:00
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d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4");
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2013-06-07 14:11:07 +02:00
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*isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0"));
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2009-08-28 15:28:13 +02:00
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return d->devfn;
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}
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2011-12-04 19:22:06 +01:00
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static void piix4_class_init(ObjectClass *klass, void *data)
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{
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2011-12-08 04:34:16 +01:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2011-12-04 19:22:06 +01:00
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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2015-01-19 15:52:30 +01:00
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k->realize = piix4_realize;
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2011-12-04 19:22:06 +01:00
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k->vendor_id = PCI_VENDOR_ID_INTEL;
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k->device_id = PCI_DEVICE_ID_INTEL_82371AB_0;
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k->class_id = PCI_CLASS_BRIDGE_ISA;
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2011-12-08 04:34:16 +01:00
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dc->desc = "ISA bridge";
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dc->vmsd = &vmstate_piix4;
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2013-11-28 17:27:00 +01:00
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/*
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* Reason: part of PIIX4 southbridge, needs to be wired up,
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* e.g. by mips_malta_init()
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*/
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2017-05-03 22:35:44 +02:00
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dc->user_creatable = false;
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2014-02-05 16:36:48 +01:00
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dc->hotpluggable = false;
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2011-12-04 19:22:06 +01:00
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}
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2013-01-10 16:19:07 +01:00
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static const TypeInfo piix4_info = {
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2015-05-13 02:43:24 +02:00
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.name = TYPE_PIIX4_PCI_DEVICE,
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2011-12-08 04:34:16 +01:00
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PIIX4State),
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.class_init = piix4_class_init,
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2009-08-28 15:28:13 +02:00
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};
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2012-02-09 15:20:55 +01:00
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static void piix4_register_types(void)
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2009-08-28 15:28:13 +02:00
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{
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2011-12-08 04:34:16 +01:00
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type_register_static(&piix4_info);
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2009-08-28 15:28:13 +02:00
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}
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2012-02-09 15:20:55 +01:00
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type_init(piix4_register_types)
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