2016-10-06 16:12:11 +02:00
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|
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@node Implementation notes
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@appendix Implementation notes
|
2006-04-30 23:58:41 +02:00
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@menu
|
2016-10-06 16:49:03 +02:00
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* CPU emulation::
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* Translator Internals::
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* QEMU compared to other emulators::
|
2018-05-11 19:24:43 +02:00
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* Managed start up options::
|
2016-10-06 16:49:03 +02:00
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* Bibliography::
|
2006-04-30 23:58:41 +02:00
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@end menu
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2016-10-06 16:49:03 +02:00
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@node CPU emulation
|
2016-10-06 16:12:11 +02:00
|
|
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@section CPU emulation
|
2004-04-04 17:21:17 +02:00
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|
2006-04-30 23:58:41 +02:00
|
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@menu
|
2016-10-06 16:49:03 +02:00
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* x86:: x86 and x86-64 emulation
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* ARM:: ARM emulation
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* MIPS:: MIPS emulation
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* PPC:: PowerPC emulation
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* SPARC:: Sparc32 and Sparc64 emulation
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* Xtensa:: Xtensa emulation
|
2006-04-30 23:58:41 +02:00
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@end menu
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|
2016-10-06 16:49:03 +02:00
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@node x86
|
2016-10-06 16:12:11 +02:00
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@subsection x86 and x86-64 emulation
|
2004-04-04 17:21:17 +02:00
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|
QEMU x86 target features:
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|
2007-09-16 23:08:06 +02:00
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|
@itemize
|
2004-04-04 17:21:17 +02:00
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|
2007-09-16 23:08:06 +02:00
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@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
|
2008-10-09 20:52:04 +02:00
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|
LDT/GDT and IDT are emulated. VM86 mode is also supported to run
|
|
|
|
DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
|
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|
|
and SSE4 as well as x86-64 SVM.
|
2004-04-04 17:21:17 +02:00
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|
@item Support of host page sizes bigger than 4KB in user mode emulation.
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@item QEMU can emulate itself on x86.
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|
2007-09-16 23:08:06 +02:00
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|
|
@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
|
2004-04-04 17:21:17 +02:00
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It can be used to test other x86 virtual CPUs.
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@end itemize
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|
|
|
Current QEMU limitations:
|
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|
|
2007-09-16 23:08:06 +02:00
|
|
|
@itemize
|
2004-04-04 17:21:17 +02:00
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|
2008-10-09 20:52:04 +02:00
|
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|
@item Limited x86-64 support.
|
2004-04-04 17:21:17 +02:00
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@item IPC syscalls are missing.
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|
2007-09-16 23:08:06 +02:00
|
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|
@item The x86 segment limits and access rights are not tested at every
|
2004-04-04 17:21:17 +02:00
|
|
|
memory access (yet). Hopefully, very few OSes seem to rely on that for
|
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|
|
normal use.
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@end itemize
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|
2016-10-06 16:49:03 +02:00
|
|
|
@node ARM
|
2016-10-06 16:12:11 +02:00
|
|
|
@subsection ARM emulation
|
2004-04-04 17:21:17 +02:00
|
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|
@itemize
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|
@item Full ARM 7 user emulation.
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|
|
@item NWFPE FPU support included in user Linux emulation.
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@item Can run most ARM Linux binaries.
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@end itemize
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|
2016-10-06 16:49:03 +02:00
|
|
|
@node MIPS
|
2016-10-06 16:12:11 +02:00
|
|
|
@subsection MIPS emulation
|
2007-07-11 12:24:28 +02:00
|
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|
@itemize
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|
|
@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
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|
|
|
including privileged instructions, FPU and MMU, in both little and big
|
|
|
|
endian modes.
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|
|
@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
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|
@end itemize
|
|
|
|
|
|
|
|
Current QEMU limitations:
|
|
|
|
|
|
|
|
@itemize
|
|
|
|
|
|
|
|
@item Self-modifying code is not always handled correctly.
|
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|
|
@item 64 bit userland emulation is not implemented.
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|
|
@item The system emulation is not complete enough to run real firmware.
|
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|
|
2007-07-12 11:03:30 +02:00
|
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|
@item The watchpoint debug facility is not implemented.
|
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|
|
|
2007-07-11 12:24:28 +02:00
|
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|
@end itemize
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|
2016-10-06 16:49:03 +02:00
|
|
|
@node PPC
|
2016-10-06 16:12:11 +02:00
|
|
|
@subsection PowerPC emulation
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@itemize
|
|
|
|
|
2007-09-16 23:08:06 +02:00
|
|
|
@item Full PowerPC 32 bit emulation, including privileged instructions,
|
2004-04-04 17:21:17 +02:00
|
|
|
FPU and MMU.
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|
|
@item Can run most PowerPC Linux binaries.
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|
@end itemize
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|
|
2016-10-06 16:49:03 +02:00
|
|
|
@node SPARC
|
2016-10-06 16:12:11 +02:00
|
|
|
@subsection Sparc32 and Sparc64 emulation
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@itemize
|
|
|
|
|
2007-04-05 20:40:23 +02:00
|
|
|
@item Full SPARC V8 emulation, including privileged
|
2005-07-02 16:31:34 +02:00
|
|
|
instructions, FPU and MMU. SPARC V9 emulation includes most privileged
|
2007-10-20 10:09:05 +02:00
|
|
|
and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2007-10-20 10:09:05 +02:00
|
|
|
@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
|
|
|
|
some 64-bit SPARC Linux binaries.
|
2005-07-02 16:31:34 +02:00
|
|
|
|
|
|
|
@end itemize
|
|
|
|
|
|
|
|
Current QEMU limitations:
|
|
|
|
|
2007-09-16 23:08:06 +02:00
|
|
|
@itemize
|
2005-07-02 16:31:34 +02:00
|
|
|
|
|
|
|
@item IPC syscalls are missing.
|
|
|
|
|
2007-11-25 19:40:20 +01:00
|
|
|
@item Floating point exception support is buggy.
|
2005-07-02 16:31:34 +02:00
|
|
|
|
|
|
|
@item Atomic instructions are not correctly implemented.
|
|
|
|
|
2008-10-09 20:52:04 +02:00
|
|
|
@item There are still some problems with Sparc64 emulators.
|
|
|
|
|
|
|
|
@end itemize
|
|
|
|
|
2016-10-06 16:49:03 +02:00
|
|
|
@node Xtensa
|
2016-10-06 16:12:11 +02:00
|
|
|
@subsection Xtensa emulation
|
2011-10-10 12:48:23 +02:00
|
|
|
|
|
|
|
@itemize
|
|
|
|
|
|
|
|
@item Core Xtensa ISA emulation, including most options: code density,
|
|
|
|
loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
|
2012-11-29 16:53:20 +01:00
|
|
|
MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
|
|
|
|
context, debug, multiprocessor synchronization,
|
2011-10-10 12:48:23 +02:00
|
|
|
conditional store, exceptions, relocatable vectors, unaligned exception,
|
|
|
|
interrupts (including high priority and timer), hardware alignment,
|
|
|
|
region protection, region translation, MMU, windowed registers, thread
|
|
|
|
pointer, processor ID.
|
|
|
|
|
2012-11-29 16:53:20 +01:00
|
|
|
@item Not implemented options: data/instruction cache (including cache
|
|
|
|
prefetch and locking), XLMI, processor interface. Also options not
|
|
|
|
covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
|
2011-10-10 12:48:23 +02:00
|
|
|
|
|
|
|
@item Can run most Xtensa Linux binaries.
|
|
|
|
|
|
|
|
@item New core configuration that requires no additional instructions
|
|
|
|
may be created from overlay with minimal amount of hand-written code.
|
|
|
|
|
|
|
|
@end itemize
|
|
|
|
|
2016-10-06 16:49:03 +02:00
|
|
|
@node Translator Internals
|
2016-10-06 16:12:11 +02:00
|
|
|
@section Translator Internals
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
QEMU is a dynamic translator. When it first encounters a piece of code,
|
|
|
|
it converts it to the host instruction set. Usually dynamic translators
|
|
|
|
are very complicated and highly CPU dependent. QEMU uses some tricks
|
|
|
|
which make it relatively easily portable and simple while achieving good
|
|
|
|
performances.
|
|
|
|
|
2016-10-06 15:10:10 +02:00
|
|
|
QEMU's dynamic translation backend is called TCG, for "Tiny Code
|
|
|
|
Generator". For more information, please take a look at @code{tcg/README}.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
Some notable features of QEMU's dynamic translator are:
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
@table @strong
|
|
|
|
|
|
|
|
@item CPU state optimisations:
|
2008-10-09 20:52:04 +02:00
|
|
|
The target CPUs have many internal states which change the way it
|
|
|
|
evaluates instructions. In order to achieve a good speed, the
|
|
|
|
translation phase considers that some state information of the virtual
|
|
|
|
CPU cannot change in it. The state is recorded in the Translation
|
|
|
|
Block (TB). If the state changes (e.g. privilege level), a new TB will
|
|
|
|
be generated and the previous TB won't be used anymore until the state
|
2016-10-06 16:25:12 +02:00
|
|
|
matches the state recorded in the previous TB. The same idea can be applied
|
|
|
|
to other aspects of the CPU state. For example, on x86, if the SS,
|
2008-10-09 20:52:04 +02:00
|
|
|
DS and ES segments have a zero base, then the translator does not even
|
|
|
|
generate an addition for the segment base.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
@item Direct block chaining:
|
2004-04-04 17:21:17 +02:00
|
|
|
After each translated basic block is executed, QEMU uses the simulated
|
2015-07-03 11:50:57 +02:00
|
|
|
Program Counter (PC) and other cpu state information (such as the CS
|
2004-04-04 17:21:17 +02:00
|
|
|
segment base value) to find the next basic block.
|
|
|
|
|
|
|
|
In order to accelerate the most common cases where the new simulated PC
|
|
|
|
is known, QEMU can patch a basic block so that it jumps directly to the
|
|
|
|
next one.
|
|
|
|
|
|
|
|
The most portable code uses an indirect jump. An indirect jump makes
|
|
|
|
it easier to make the jump target modification atomic. On some host
|
|
|
|
architectures (such as x86 or PowerPC), the @code{JUMP} opcode is
|
|
|
|
directly patched so that the block chaining has no overhead.
|
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
@item Self-modifying code and translated code invalidation:
|
2004-04-04 17:21:17 +02:00
|
|
|
Self-modifying code is a special challenge in x86 emulation because no
|
|
|
|
instruction cache invalidation is signaled by the application when code
|
|
|
|
is modified.
|
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
User-mode emulation marks a host page as write-protected (if it is
|
|
|
|
not already read-only) every time translated code is generated for a
|
|
|
|
basic block. Then, if a write access is done to the page, Linux raises
|
|
|
|
a SEGV signal. QEMU then invalidates all the translated code in the page
|
|
|
|
and enables write accesses to the page. For system emulation, write
|
|
|
|
protection is achieved through the software MMU.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
Correct translated code invalidation is done efficiently by maintaining
|
|
|
|
a linked list of every translated block contained in a given page. Other
|
2007-09-16 23:08:06 +02:00
|
|
|
linked lists are also maintained to undo direct block chaining.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2008-10-09 20:52:04 +02:00
|
|
|
On RISC targets, correctly written software uses memory barriers and
|
|
|
|
cache flushes, so some of the protection above would not be
|
|
|
|
necessary. However, QEMU still requires that the generated code always
|
|
|
|
matches the target instructions in memory in order to handle
|
|
|
|
exceptions correctly.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
@item Exception support:
|
2004-04-04 17:21:17 +02:00
|
|
|
longjmp() is used when an exception such as division by zero is
|
2007-09-16 23:08:06 +02:00
|
|
|
encountered.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
The host SIGSEGV and SIGBUS signal handlers are used to get invalid
|
2016-10-06 16:25:12 +02:00
|
|
|
memory accesses. QEMU keeps a map from host program counter to
|
|
|
|
target program counter, and looks up where the exception happened
|
|
|
|
based on the host program counter at the exception point.
|
|
|
|
|
|
|
|
On some targets, some bits of the virtual CPU's state are not flushed to the
|
|
|
|
memory until the end of the translation block. This is done for internal
|
|
|
|
emulation state that is rarely accessed directly by the program and/or changes
|
|
|
|
very often throughout the execution of a translation block---this includes
|
|
|
|
condition codes on x86, delay slots on SPARC, conditional execution on
|
|
|
|
ARM, and so on. This state is stored for each target instruction, and
|
|
|
|
looked up on exceptions.
|
|
|
|
|
|
|
|
@item MMU emulation:
|
|
|
|
For system emulation QEMU uses a software MMU. In that mode, the MMU
|
2008-10-09 20:52:04 +02:00
|
|
|
virtual to physical address translation is done at every memory
|
2016-10-06 16:25:12 +02:00
|
|
|
access.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
QEMU uses an address translation cache (TLB) to speed up the translation.
|
2004-04-04 17:21:17 +02:00
|
|
|
In order to avoid flushing the translated code each time the MMU
|
2016-10-06 16:25:12 +02:00
|
|
|
mappings change, all caches in QEMU are physically indexed. This
|
2007-09-16 23:08:06 +02:00
|
|
|
means that each basic block is indexed with its physical address.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
2016-10-06 16:25:12 +02:00
|
|
|
In order to avoid invalidating the basic block chain when MMU mappings
|
|
|
|
change, chaining is only performed when the destination of the jump
|
|
|
|
shares a page with the basic block that is performing the jump.
|
|
|
|
|
|
|
|
The MMU can also distinguish RAM and ROM memory areas from MMIO memory
|
|
|
|
areas. Access is faster for RAM and ROM because the translation cache also
|
|
|
|
hosts the offset between guest address and host memory. Accessing MMIO
|
|
|
|
memory areas instead calls out to C code for device emulation.
|
|
|
|
Finally, the MMU helps tracking dirty pages and pages pointed to by
|
|
|
|
translation blocks.
|
|
|
|
@end table
|
2008-10-09 20:52:04 +02:00
|
|
|
|
2016-10-06 16:49:03 +02:00
|
|
|
@node QEMU compared to other emulators
|
2016-10-06 16:12:11 +02:00
|
|
|
@section QEMU compared to other emulators
|
2016-10-06 16:49:03 +02:00
|
|
|
|
|
|
|
Like bochs [1], QEMU emulates an x86 CPU. But QEMU is much faster than
|
|
|
|
bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC
|
|
|
|
emulation while QEMU can emulate several processors.
|
|
|
|
|
|
|
|
Like Valgrind [2], QEMU does user space emulation and dynamic
|
|
|
|
translation. Valgrind is mainly a memory debugger while QEMU has no
|
|
|
|
support for it (QEMU could be used to detect out of bound memory
|
|
|
|
accesses as Valgrind, but it has no support to track uninitialised data
|
|
|
|
as Valgrind does). The Valgrind dynamic translator generates better code
|
|
|
|
than QEMU (in particular it does register allocation) but it is closely
|
|
|
|
tied to an x86 host and target and has no support for precise exceptions
|
|
|
|
and system emulation.
|
|
|
|
|
|
|
|
EM86 [3] is the closest project to user space QEMU (and QEMU still uses
|
|
|
|
some of its code, in particular the ELF file loader). EM86 was limited
|
|
|
|
to an alpha host and used a proprietary and slow interpreter (the
|
|
|
|
interpreter part of the FX!32 Digital Win32 code translator [4]).
|
|
|
|
|
|
|
|
TWIN from Willows Software was a Windows API emulator like Wine. It is less
|
|
|
|
accurate than Wine but includes a protected mode x86 interpreter to launch
|
|
|
|
x86 Windows executables. Such an approach has greater potential because most
|
|
|
|
of the Windows API is executed natively but it is far more difficult to
|
|
|
|
develop because all the data structures and function parameters exchanged
|
|
|
|
between the API and the x86 code must be converted.
|
|
|
|
|
|
|
|
User mode Linux [5] was the only solution before QEMU to launch a
|
|
|
|
Linux kernel as a process while not needing any host kernel
|
|
|
|
patches. However, user mode Linux requires heavy kernel patches while
|
|
|
|
QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is
|
|
|
|
slower.
|
|
|
|
|
|
|
|
The Plex86 [6] PC virtualizer is done in the same spirit as the now
|
|
|
|
obsolete qemu-fast system emulator. It requires a patched Linux kernel
|
|
|
|
to work (you cannot launch the same kernel on your PC), but the
|
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patches are really small. As it is a PC virtualizer (no emulation is
|
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|
done except for some privileged instructions), it has the potential of
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being faster than QEMU. The downside is that a complicated (and
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|
potentially unsafe) host kernel patch is needed.
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The commercial PC Virtualizers (VMWare [7], VirtualPC [8]) are faster
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|
than QEMU (without virtualization), but they all need specific, proprietary
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|
and potentially unsafe host drivers. Moreover, they are unable to
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|
provide cycle exact simulation as an emulator can.
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VirtualBox [9], Xen [10] and KVM [11] are based on QEMU. QEMU-SystemC
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[12] uses QEMU to simulate a system where some hardware devices are
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developed in SystemC.
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|
2018-05-11 19:24:43 +02:00
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@node Managed start up options
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@section Managed start up options
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In system mode emulation, it's possible to create a VM in a paused state using
|
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|
the -S command line option. In this state the machine is completely initialized
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|
according to command line options and ready to execute VM code but VCPU threads
|
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|
|
are not executing any code. The VM state in this paused state depends on the way
|
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|
|
QEMU was started. It could be in:
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|
@table @asis
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|
|
@item initial state (after reset/power on state)
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|
@item with direct kernel loading, the initial state could be amended to execute
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|
code loaded by QEMU in the VM's RAM and with incoming migration
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|
@item with incoming migration, initial state will by amended with the migrated
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|
machine state after migration completes.
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@end table
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This paused state is typically used by users to query machine state and/or
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|
additionally configure the machine (by hotplugging devices) in runtime before
|
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|
|
allowing VM code to run.
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|
However, at the -S pause point, it's impossible to configure options that affect
|
2018-07-05 11:14:02 +02:00
|
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|
initial VM creation (like: -smp/-m/-numa ...) or cold plug devices. The
|
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|
|
experimental --preconfig command line option allows pausing QEMU
|
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|
|
before the initial VM creation, in a ``preconfig'' state, where additional
|
2018-05-11 19:24:43 +02:00
|
|
|
queries and configuration can be performed via QMP before moving on to
|
|
|
|
the resulting configuration startup. In the preconfig state, QEMU only allows
|
|
|
|
a limited set of commands over the QMP monitor, where the commands do not
|
|
|
|
depend on an initialized machine, including but not limited to:
|
|
|
|
@table @asis
|
|
|
|
@item qmp_capabilities
|
|
|
|
@item query-qmp-schema
|
|
|
|
@item query-commands
|
|
|
|
@item query-status
|
2018-07-05 11:14:02 +02:00
|
|
|
@item x-exit-preconfig
|
2018-05-11 19:24:43 +02:00
|
|
|
@end table
|
|
|
|
|
2006-04-30 23:58:41 +02:00
|
|
|
@node Bibliography
|
2016-10-06 16:12:11 +02:00
|
|
|
@section Bibliography
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@table @asis
|
|
|
|
|
2007-09-16 23:08:06 +02:00
|
|
|
@item [1]
|
2015-09-25 11:38:36 +02:00
|
|
|
@url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project,
|
|
|
|
by Kevin Lawton et al.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@item [2]
|
2015-09-25 11:38:36 +02:00
|
|
|
@url{http://www.valgrind.org/}, Valgrind, an open-source memory debugger
|
|
|
|
for GNU/Linux.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@item [3]
|
2015-09-25 11:38:36 +02:00
|
|
|
@url{http://ftp.dreamtime.org/pub/linux/Linux-Alpha/em86/v0.2/docs/em86.html},
|
|
|
|
the EM86 x86 emulator on Alpha-Linux.
|
2004-04-04 17:21:17 +02:00
|
|
|
|
|
|
|
@item [4]
|
2006-04-30 23:58:41 +02:00
|
|
|
@url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf},
|
2004-04-04 17:21:17 +02:00
|
|
|
DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton
|
|
|
|
Chernoff and Ray Hookway.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [5]
|
2007-09-16 23:08:06 +02:00
|
|
|
@url{http://user-mode-linux.sourceforge.net/},
|
2004-04-04 17:21:17 +02:00
|
|
|
The User-mode Linux Kernel.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [6]
|
2007-09-16 23:08:06 +02:00
|
|
|
@url{http://www.plex86.org/},
|
2004-04-04 17:21:17 +02:00
|
|
|
The new Plex86 project.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [7]
|
2007-09-16 23:08:06 +02:00
|
|
|
@url{http://www.vmware.com/},
|
2004-04-04 17:21:17 +02:00
|
|
|
The VMWare PC virtualizer.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [8]
|
|
|
|
@url{https://www.microsoft.com/download/details.aspx?id=3702},
|
2004-04-04 17:21:17 +02:00
|
|
|
The VirtualPC PC virtualizer.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [9]
|
2008-10-09 20:52:04 +02:00
|
|
|
@url{http://virtualbox.org/},
|
|
|
|
The VirtualBox PC virtualizer.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [10]
|
2008-10-09 20:52:04 +02:00
|
|
|
@url{http://www.xen.org/},
|
|
|
|
The Xen hypervisor.
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [11]
|
|
|
|
@url{http://www.linux-kvm.org/},
|
2008-10-09 20:52:04 +02:00
|
|
|
Kernel Based Virtual Machine (KVM).
|
|
|
|
|
2015-09-25 11:38:36 +02:00
|
|
|
@item [12]
|
2008-10-09 20:52:04 +02:00
|
|
|
@url{http://www.greensocs.com/projects/QEMUSystemC},
|
|
|
|
QEMU-SystemC, a hardware co-simulator.
|
|
|
|
|
2004-04-04 17:21:17 +02:00
|
|
|
@end table
|