2009-03-02 17:42:04 +01:00
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#if !defined(__OPENPIC_H__)
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#define __OPENPIC_H__
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/* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */
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enum {
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OPENPIC_OUTPUT_INT = 0, /* IRQ */
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OPENPIC_OUTPUT_CINT, /* critical IRQ */
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OPENPIC_OUTPUT_MCK, /* Machine check event */
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OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */
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OPENPIC_OUTPUT_RESET, /* Core reset event */
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OPENPIC_OUTPUT_NB,
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};
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2012-12-07 23:51:09 +01:00
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/* OpenPIC capability flags */
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#define OPENPIC_FLAG_IDE_CRIT (1 << 0)
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2011-12-21 23:18:02 +01:00
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qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
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2012-12-08 02:18:58 +01:00
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qemu_irq **irqs);
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2012-10-23 12:30:10 +02:00
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qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
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2012-12-08 02:18:58 +01:00
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int nb_cpus, qemu_irq **irqs);
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2009-03-02 17:42:04 +01:00
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#endif /* __OPENPIC_H__ */
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