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qemu-e2k/tests/tcg/loongarch64/Makefile.target

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tests/tcg/loongarch64: Add clo related instructions test This includes: - CL{O/Z}.{W/D} - CT{O/Z}.{W/D} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-5-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:22 +02:00
# -*- Mode: makefile -*-
#
# LoongArch64 specific tweaks
# Loongarch64 doesn't support gdb, so skip the EXTRA_RUNS
EXTRA_RUNS =
LOONGARCH64_SRC=$(SRC_PATH)/tests/tcg/loongarch64
VPATH += $(LOONGARCH64_SRC)
LDFLAGS+=-lm
LOONGARCH64_TESTS = test_bit
tests/tcg/loongarch64: Add div and mod related instructions test This includes: - DIV.{W[U]/D[U]} - MOD.{W[U]/D[U]} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-6-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:23 +02:00
LOONGARCH64_TESTS += test_div
tests/tcg/loongarch64: Add fclass test This includes: - FCLASS.{S/D} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-7-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:24 +02:00
LOONGARCH64_TESTS += test_fclass
tests/tcg/loongarch64: Add fp comparison instructions test Choose some instructions to test: - FCMP.cond.S - cond: ceq clt cle cne seq slt sle sne Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-8-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:25 +02:00
LOONGARCH64_TESTS += test_fpcom
tests/tcg/loongarch64: Add pcadd related instructions test This includes: - PCADDI - PCADDU12I - PCADDU18I - PCALAU12I Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-9-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:26 +02:00
LOONGARCH64_TESTS += test_pcadd
target/loongarch: Remove cpu_fcsr0 All of the fpu operations are defined with TCG_CALL_NO_WG, but they all modify FCSR0. The most efficient way to fix this is to remove cpu_fcsr0, and instead use explicit load and store operations for the two instructions that manipulate that value. Acked-by: Qi Hu <huqi@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Reported-by: Feiyang Chen <chenfeiyang@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-08-06 19:04:44 +02:00
LOONGARCH64_TESTS += test_fcsr
tests/tcg/loongarch64: Add clo related instructions test This includes: - CL{O/Z}.{W/D} - CT{O/Z}.{W/D} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-5-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-16 10:54:22 +02:00
TESTS += $(LOONGARCH64_TESTS)
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