2020-08-07 12:10:23 +02:00
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# FIXME extra_args should accept files()
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2021-04-24 05:34:25 +02:00
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gen = [
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decodetree.process('insn16.decode', extra_args: ['--static-decode=decode_insn16', '--insnwidth=16']),
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2021-04-24 05:34:12 +02:00
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decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
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2023-01-31 21:20:00 +01:00
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decodetree.process('xthead.decode', extra_args: '--static-decode=decode_xthead'),
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2022-02-02 01:52:48 +01:00
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decodetree.process('XVentanaCondOps.decode', extra_args: '--static-decode=decode_XVentanaCodeOps'),
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2020-08-07 12:10:23 +02:00
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]
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riscv_ss = ss.source_set()
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2021-04-24 05:34:25 +02:00
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riscv_ss.add(gen)
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2020-08-07 12:10:23 +02:00
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riscv_ss.add(files(
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'cpu.c',
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'cpu_helper.c',
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'csr.c',
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'fpu_helper.c',
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'gdbstub.c',
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'op_helper.c',
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'vector_helper.c',
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2023-07-11 18:59:00 +02:00
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'vector_internals.c',
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2021-05-05 18:06:13 +02:00
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'bitmanip_helper.c',
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2020-08-07 12:10:23 +02:00
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'translate.c',
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2022-04-23 04:35:02 +02:00
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'm128_helper.c',
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2023-03-07 09:14:00 +01:00
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'crypto_helper.c',
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2023-07-11 18:59:03 +02:00
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'zce_helper.c',
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'vcrypto_helper.c'
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2020-08-07 12:10:23 +02:00
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))
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2023-06-13 15:33:47 +02:00
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riscv_system_ss = ss.source_set()
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riscv_system_ss.add(files(
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2021-02-01 13:44:58 +01:00
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'arch_dump.c',
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2020-08-07 12:10:23 +02:00
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'pmp.c',
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2022-03-15 07:55:23 +01:00
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'debug.c',
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2020-10-26 12:55:26 +01:00
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'monitor.c',
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2022-06-21 01:15:57 +02:00
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'machine.c',
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2022-08-25 00:13:56 +02:00
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'pmu.c',
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target/riscv: add query-cpy-definitions support
This command is used by tooling like libvirt to retrieve a list of
supported CPUs. Each entry returns a CpuDefinitionInfo object that
contains more information about each CPU.
This initial support includes only the name of the CPU and its typename.
Here's what the command produces for the riscv64 target:
$ ./build/qemu-system-riscv64 -S -M virt -display none -qmp stdio
{"QMP": {"version": (...)}
{"execute": "qmp_capabilities", "arguments": {"enable": ["oob"]}}
{"return": {}}
{"execute": "query-cpu-definitions"}
{"return": [
{"name": "rv64", "typename": "rv64-riscv-cpu", "static": false, "deprecated": false},
{"name": "sifive-e51", "typename": "sifive-e51-riscv-cpu", "static": false, "deprecated": false},
{"name": "any", "typename": "any-riscv-cpu", "static": false, "deprecated": false},
{"name": "x-rv128", "typename": "x-rv128-riscv-cpu", "static": false, "deprecated": false},
{"name": "shakti-c", "typename": "shakti-c-riscv-cpu", "static": false, "deprecated": false},
{"name": "thead-c906", "typename": "thead-c906-riscv-cpu", "static": false, "deprecated": false},
{"name": "sifive-u54", "typename": "sifive-u54-riscv-cpu", "static": false, "deprecated": false}]
}
Next patch will introduce a way to tell whether a given CPU is static or
not.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230411183511.189632-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-04-11 20:35:10 +02:00
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'time_helper.c',
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'riscv-qmp-cmds.c',
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2020-08-07 12:10:23 +02:00
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))
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2023-09-25 19:56:51 +02:00
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subdir('tcg')
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2023-09-25 19:57:02 +02:00
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subdir('kvm')
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2023-09-25 19:56:51 +02:00
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2020-08-07 12:10:23 +02:00
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target_arch += {'riscv': riscv_ss}
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2023-10-04 11:06:27 +02:00
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target_system_arch += {'riscv': riscv_system_ss}
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