2019-02-01 15:55:43 +01:00
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/*
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* ARM SSE-200 CPU_IDENTITY register block
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*
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* Copyright (c) 2019 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/*
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* This is a model of the "CPU_IDENTITY" register block which is part of the
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* Arm SSE-200 and documented in
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/101104/latest/
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2019-02-01 15:55:43 +01:00
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*
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* QEMU interface:
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* + QOM property "CPUID": the value to use for the CPUID register
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* + sysbus MMIO region 0: the system information register bank
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*/
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#ifndef HW_MISC_ARMSSE_CPUID_H
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#define HW_MISC_ARMSSE_CPUID_H
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#include "hw/sysbus.h"
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2020-09-03 22:43:22 +02:00
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#include "qom/object.h"
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2019-02-01 15:55:43 +01:00
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#define TYPE_ARMSSE_CPUID "armsse-cpuid"
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2020-09-16 20:25:19 +02:00
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OBJECT_DECLARE_SIMPLE_TYPE(ARMSSECPUID, ARMSSE_CPUID)
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2019-02-01 15:55:43 +01:00
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2020-09-03 22:43:22 +02:00
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struct ARMSSECPUID {
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2019-02-01 15:55:43 +01:00
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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/* Properties */
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uint32_t cpuid;
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2020-09-03 22:43:22 +02:00
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};
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2019-02-01 15:55:43 +01:00
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#endif
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