2020-10-10 15:57:49 +02:00
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/*
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* BCM2835 CPRMAN clock manager
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*
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* Copyright (c) 2020 Luc Michel <luc@lmichel.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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2022-05-06 15:49:08 +02:00
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#ifndef HW_MISC_BCM2835_CPRMAN_H
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#define HW_MISC_BCM2835_CPRMAN_H
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2020-10-10 15:57:49 +02:00
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#include "hw/sysbus.h"
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#include "hw/qdev-clock.h"
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#define TYPE_BCM2835_CPRMAN "bcm2835-cprman"
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typedef struct BCM2835CprmanState BCM2835CprmanState;
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DECLARE_INSTANCE_CHECKER(BCM2835CprmanState, CPRMAN,
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TYPE_BCM2835_CPRMAN)
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#define CPRMAN_NUM_REGS (0x2000 / sizeof(uint32_t))
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hw/misc/bcm2835_cprman: add a PLL skeleton implementation
There are 5 PLLs in the CPRMAN, namely PLL A, C, D, H and B. All of them
take the xosc clock as input and produce a new clock.
This commit adds a skeleton implementation for the PLLs as sub-devices
of the CPRMAN. The PLLs are instantiated and connected internally to the
main oscillator.
Each PLL has 6 registers : CM, A2W_CTRL, A2W_ANA[0,1,2,3], A2W_FRAC. A
write to any of them triggers a call to the (not yet implemented)
pll_update function.
If the main oscillator changes frequency, an update is also triggered.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-10 15:57:50 +02:00
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typedef enum CprmanPll {
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CPRMAN_PLLA = 0,
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CPRMAN_PLLC,
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CPRMAN_PLLD,
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CPRMAN_PLLH,
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CPRMAN_PLLB,
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CPRMAN_NUM_PLL
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} CprmanPll;
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2020-10-10 15:57:52 +02:00
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typedef enum CprmanPllChannel {
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CPRMAN_PLLA_CHANNEL_DSI0 = 0,
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CPRMAN_PLLA_CHANNEL_CORE,
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CPRMAN_PLLA_CHANNEL_PER,
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CPRMAN_PLLA_CHANNEL_CCP2,
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CPRMAN_PLLC_CHANNEL_CORE2,
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CPRMAN_PLLC_CHANNEL_CORE1,
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CPRMAN_PLLC_CHANNEL_PER,
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CPRMAN_PLLC_CHANNEL_CORE0,
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CPRMAN_PLLD_CHANNEL_DSI0,
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CPRMAN_PLLD_CHANNEL_CORE,
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CPRMAN_PLLD_CHANNEL_PER,
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CPRMAN_PLLD_CHANNEL_DSI1,
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CPRMAN_PLLH_CHANNEL_AUX,
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CPRMAN_PLLH_CHANNEL_RCAL,
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CPRMAN_PLLH_CHANNEL_PIX,
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CPRMAN_PLLB_CHANNEL_ARM,
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CPRMAN_NUM_PLL_CHANNEL,
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2020-10-10 15:57:54 +02:00
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/* Special values used when connecting clock sources to clocks */
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CPRMAN_CLOCK_SRC_NORMAL = -1,
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CPRMAN_CLOCK_SRC_FORCE_GROUND = -2,
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CPRMAN_CLOCK_SRC_DSI0HSCK = -3,
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2020-10-10 15:57:52 +02:00
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} CprmanPllChannel;
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2020-10-10 15:57:54 +02:00
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typedef enum CprmanClockMux {
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CPRMAN_CLOCK_GNRIC,
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CPRMAN_CLOCK_VPU,
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CPRMAN_CLOCK_SYS,
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CPRMAN_CLOCK_PERIA,
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CPRMAN_CLOCK_PERII,
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CPRMAN_CLOCK_H264,
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CPRMAN_CLOCK_ISP,
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CPRMAN_CLOCK_V3D,
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CPRMAN_CLOCK_CAM0,
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CPRMAN_CLOCK_CAM1,
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CPRMAN_CLOCK_CCP2,
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CPRMAN_CLOCK_DSI0E,
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CPRMAN_CLOCK_DSI0P,
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CPRMAN_CLOCK_DPI,
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CPRMAN_CLOCK_GP0,
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CPRMAN_CLOCK_GP1,
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CPRMAN_CLOCK_GP2,
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CPRMAN_CLOCK_HSM,
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CPRMAN_CLOCK_OTP,
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CPRMAN_CLOCK_PCM,
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CPRMAN_CLOCK_PWM,
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CPRMAN_CLOCK_SLIM,
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CPRMAN_CLOCK_SMI,
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CPRMAN_CLOCK_TEC,
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CPRMAN_CLOCK_TD0,
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CPRMAN_CLOCK_TD1,
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CPRMAN_CLOCK_TSENS,
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CPRMAN_CLOCK_TIMER,
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CPRMAN_CLOCK_UART,
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CPRMAN_CLOCK_VEC,
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CPRMAN_CLOCK_PULSE,
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CPRMAN_CLOCK_SDC,
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CPRMAN_CLOCK_ARM,
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CPRMAN_CLOCK_AVEO,
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CPRMAN_CLOCK_EMMC,
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CPRMAN_CLOCK_EMMC2,
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CPRMAN_NUM_CLOCK_MUX
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} CprmanClockMux;
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typedef enum CprmanClockMuxSource {
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CPRMAN_CLOCK_SRC_GND = 0,
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CPRMAN_CLOCK_SRC_XOSC,
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CPRMAN_CLOCK_SRC_TD0,
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CPRMAN_CLOCK_SRC_TD1,
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CPRMAN_CLOCK_SRC_PLLA,
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CPRMAN_CLOCK_SRC_PLLC,
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CPRMAN_CLOCK_SRC_PLLD,
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CPRMAN_CLOCK_SRC_PLLH,
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CPRMAN_CLOCK_SRC_PLLC_CORE1,
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CPRMAN_CLOCK_SRC_PLLC_CORE2,
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CPRMAN_NUM_CLOCK_MUX_SRC
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} CprmanClockMuxSource;
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hw/misc/bcm2835_cprman: add a PLL skeleton implementation
There are 5 PLLs in the CPRMAN, namely PLL A, C, D, H and B. All of them
take the xosc clock as input and produce a new clock.
This commit adds a skeleton implementation for the PLLs as sub-devices
of the CPRMAN. The PLLs are instantiated and connected internally to the
main oscillator.
Each PLL has 6 registers : CM, A2W_CTRL, A2W_ANA[0,1,2,3], A2W_FRAC. A
write to any of them triggers a call to the (not yet implemented)
pll_update function.
If the main oscillator changes frequency, an update is also triggered.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-10 15:57:50 +02:00
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typedef struct CprmanPllState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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CprmanPll id;
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uint32_t *reg_cm;
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uint32_t *reg_a2w_ctrl;
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uint32_t *reg_a2w_ana; /* ANA[0] .. ANA[3] */
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uint32_t prediv_mask; /* prediv bit in ana[1] */
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uint32_t *reg_a2w_frac;
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Clock *xosc_in;
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Clock *out;
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} CprmanPllState;
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2020-10-10 15:57:52 +02:00
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typedef struct CprmanPllChannelState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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CprmanPllChannel id;
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CprmanPll parent;
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uint32_t *reg_cm;
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uint32_t hold_mask;
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uint32_t load_mask;
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uint32_t *reg_a2w_ctrl;
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int fixed_divider;
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Clock *pll_in;
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Clock *out;
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} CprmanPllChannelState;
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2020-10-10 15:57:54 +02:00
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typedef struct CprmanClockMuxState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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CprmanClockMux id;
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uint32_t *reg_ctl;
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uint32_t *reg_div;
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int int_bits;
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int frac_bits;
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Clock *srcs[CPRMAN_NUM_CLOCK_MUX_SRC];
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Clock *out;
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/*
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* Used by clock srcs update callback to retrieve both the clock and the
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* source number.
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*/
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struct CprmanClockMuxState *backref[CPRMAN_NUM_CLOCK_MUX_SRC];
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} CprmanClockMuxState;
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2020-10-10 15:57:56 +02:00
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typedef struct CprmanDsi0HsckMuxState {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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CprmanClockMux id;
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uint32_t *reg_cm;
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Clock *plla_in;
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Clock *plld_in;
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Clock *out;
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} CprmanDsi0HsckMuxState;
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2020-10-10 15:57:49 +02:00
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struct BCM2835CprmanState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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hw/misc/bcm2835_cprman: add a PLL skeleton implementation
There are 5 PLLs in the CPRMAN, namely PLL A, C, D, H and B. All of them
take the xosc clock as input and produce a new clock.
This commit adds a skeleton implementation for the PLLs as sub-devices
of the CPRMAN. The PLLs are instantiated and connected internally to the
main oscillator.
Each PLL has 6 registers : CM, A2W_CTRL, A2W_ANA[0,1,2,3], A2W_FRAC. A
write to any of them triggers a call to the (not yet implemented)
pll_update function.
If the main oscillator changes frequency, an update is also triggered.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-10 15:57:50 +02:00
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CprmanPllState plls[CPRMAN_NUM_PLL];
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2020-10-10 15:57:52 +02:00
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CprmanPllChannelState channels[CPRMAN_NUM_PLL_CHANNEL];
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2020-10-10 15:57:54 +02:00
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CprmanClockMuxState clock_muxes[CPRMAN_NUM_CLOCK_MUX];
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2020-10-10 15:57:56 +02:00
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CprmanDsi0HsckMuxState dsi0hsck_mux;
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hw/misc/bcm2835_cprman: add a PLL skeleton implementation
There are 5 PLLs in the CPRMAN, namely PLL A, C, D, H and B. All of them
take the xosc clock as input and produce a new clock.
This commit adds a skeleton implementation for the PLLs as sub-devices
of the CPRMAN. The PLLs are instantiated and connected internally to the
main oscillator.
Each PLL has 6 registers : CM, A2W_CTRL, A2W_ANA[0,1,2,3], A2W_FRAC. A
write to any of them triggers a call to the (not yet implemented)
pll_update function.
If the main oscillator changes frequency, an update is also triggered.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Luc Michel <luc@lmichel.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-10 15:57:50 +02:00
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2020-10-10 15:57:49 +02:00
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uint32_t regs[CPRMAN_NUM_REGS];
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uint32_t xosc_freq;
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Clock *xosc;
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2020-10-10 15:57:54 +02:00
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Clock *gnd;
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2020-10-10 15:57:49 +02:00
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};
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#endif
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