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qemu-e2k/tests/tcg/aarch64/Makefile.target

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tests/tcg/arm: add fcvt test cases for AArch32/64 This runs through the usual float to float conversions and crucially also runs with ARM Alternative Half Precision Format. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-04-13 18:08:26 +02:00
# -*- Mode: makefile -*-
#
# AArch64 specific tweaks
tests/tcg: cleanup Makefile inclusions Rename Makefile.probe to Makefile.prereqs and make it actually define rules for the tests. Rename Makefile to Makefile.target, since it is not a toplevel makefile. Rename Makefile.include to Makefile.qemu and disentangle it from the QEMU Makefile.target, so that it is invoked recursively by tests/Makefile.include. Tests are now placed in tests/tcg/$(TARGET). Drop the usage of TARGET_BASE_ARCH, which is ignored by everything except x86_64 and aarch64. Fix x86 tests by using -cpu max and, while at it, standardize on QEMU_OPTS for aarch64 tests too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20190807143523.15917-3-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-08-07 16:35:22 +02:00
ARM_SRC=$(SRC_PATH)/tests/tcg/arm
VPATH += $(ARM_SRC)
tests/tcg/arm: add fcvt test cases for AArch32/64 This runs through the usual float to float conversions and crucially also runs with ARM Alternative Half Precision Format. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-04-13 18:08:26 +02:00
AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
VPATH += $(AARCH64_SRC)
tests/tcg: clean-up some comments after the de-tangling These were missed in the recent de-tangling so have been updated to be more actuate. I've also built up ARM_TESTS in a manner similar to AARCH64_TESTS for better consistency. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-19 15:18:40 +02:00
# Float-convert Tests
tests/tcg: cleanup Makefile inclusions Rename Makefile.probe to Makefile.prereqs and make it actually define rules for the tests. Rename Makefile to Makefile.target, since it is not a toplevel makefile. Rename Makefile.include to Makefile.qemu and disentangle it from the QEMU Makefile.target, so that it is invoked recursively by tests/Makefile.include. Tests are now placed in tests/tcg/$(TARGET). Drop the usage of TARGET_BASE_ARCH, which is ignored by everything except x86_64 and aarch64. Fix x86 tests by using -cpu max and, while at it, standardize on QEMU_OPTS for aarch64 tests too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20190807143523.15917-3-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-08-07 16:35:22 +02:00
AARCH64_TESTS=fcvt
tests/tcg/arm: add fcvt test cases for AArch32/64 This runs through the usual float to float conversions and crucially also runs with ARM Alternative Half Precision Format. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-04-13 18:08:26 +02:00
fcvt: LDFLAGS+=-lm
run-fcvt: fcvt
tests/tcg: add run, diff, and skip helper macros As we aren't using the default runners for all the test cases it is easy to miss out things like timeouts. To help with this we add some helpers and use them so we only need to make core changes in one place. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-05-21 11:38:37 +02:00
$(call run-test,$<,$(QEMU) $<, "$< on $(TARGET_NAME)")
$(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref)
tests/tcg/aarch64: Add pauth smoke test Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05 17:52:39 +01:00
tests/tcg: clean-up some comments after the de-tangling These were missed in the recent de-tangling so have been updated to be more actuate. I've also built up ARM_TESTS in a manner similar to AARCH64_TESTS for better consistency. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-19 15:18:40 +02:00
# Pauth Tests
tests/tcg: gate pauth-% tests on having compiler support Otherwise we end up failing to build our tests on CI which may have older compilers that the user expects. We can get rid of this once we can fallback to multiarch containers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200203090932.19147-14-alex.bennee@linaro.org>
2020-02-03 10:09:28 +01:00
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_ARMV8_3),)
target/arm: Fix AddPAC error indication The definition of top_bit used in this function is one higher than that used in the Arm ARM psuedo-code, which put the error indication at top_bit - 1 at the wrong place, which meant that it wasn't visible to Auth. Fixing the definition of top_bit requires more changes, because its most common use is for the count of bits in top_bit:bot_bit, which would then need to be computed as top_bit - bot_bit + 1. For now, prefer the minimal fix to the error indication alone. Fixes: 63ff0ca94cb Reported-by: Derrick McKee <derrick.mckee@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200728195706.11087-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: added comment about the divergence from the pseudocode] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-03 18:55:03 +02:00
AARCH64_TESTS += pauth-1 pauth-2 pauth-4 pauth-5
tests/tcg/aarch64: Fix compilation parameters for pauth-% We were incorrectly requiring ARMv8.4 support for the pauth tests, but Pointer Authentication is an ARMv8.3 extension. Further, hiding the required architecture within asm() is not correct. Correct the architecture version requested, and specify it in the cflags of the (cross-) compiler rather than in the asm. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200116230809.19078-3-richard.henderson@linaro.org [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-23 16:22:38 +01:00
pauth-%: CFLAGS += -march=armv8.3-a
tests/tcg: ensure -cpu max also used for plugin run The check-tcg plugins build was failing because some special case tests that needed -cpu max failed because the plugin variant hadn't carried across the QEMU_OPTS tweak. Guests which globally set QEMU_OPTS=-cpu FOO where unaffected. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200615141922.18829-3-alex.bennee@linaro.org>
2020-06-15 16:19:22 +02:00
run-pauth-%: QEMU_OPTS += -cpu max
run-plugin-pauth-%: QEMU_OPTS += -cpu max
tests/tcg: gate pauth-% tests on having compiler support Otherwise we end up failing to build our tests on CI which may have older compilers that the user expects. We can get rid of this once we can fallback to multiarch containers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200203090932.19147-14-alex.bennee@linaro.org>
2020-02-03 10:09:28 +01:00
endif
tests/tcg/aarch64: Add pauth smoke test Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05 17:52:39 +01:00
tests/tcg/aarch64: Add bti smoke tests The note test requires gcc 10 for -mbranch-protection=standard. The mmap test uses PROT_BTI and does not require special compiler support. Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-21 19:37:49 +02:00
# BTI Tests
# bti-1 tests the elf notes, so we require special compiler support.
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_ARMV8_BTI),)
AARCH64_TESTS += bti-1
bti-1: CFLAGS += -mbranch-protection=standard
bti-1: LDFLAGS += -nostdlib
endif
# bti-2 tests PROT_BTI, so no special compiler support required.
AARCH64_TESTS += bti-2
tests/tcg/aarch64: Add mte smoke tests Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-32-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-12 19:49:02 +01:00
# MTE Tests
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_ARMV8_MTE),)
test/tcg/aarch64: Add mte-5 Buglink: https://bugs.launchpad.net/bugs/1921948 Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210416183106.1516563-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-04-16 20:31:01 +02:00
AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6
tests/tcg/aarch64: Add mte smoke tests Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-32-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-12 19:49:02 +01:00
mte-%: CFLAGS += -march=armv8.5-a+memtag
endif
tests/tcg/aarch64: userspace system register test This tests a bunch of registers that the kernel allows userspace to read including the CPUID registers. We need a SVE aware compiler as we are testing the id_aa64zfr0_el1 register in the set. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-21-alex.bennee@linaro.org>
2020-03-16 18:21:47 +01:00
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
# System Registers Tests
AARCH64_TESTS += sysregs
sysregs: CFLAGS+=-march=armv8.1-a+sve
tests/tcg/aarch64: add a gdbstub testcase for SVE registers A very simple test case which sets and reads SVE registers while running a test case. We don't really need to compile a SVE binary for this case but we will later so keep it simple for now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-24-alex.bennee@linaro.org>
2020-03-16 18:21:50 +01:00
tests/tcg/aarch64: add SVE iotcl test This is a fairly bare-bones test of setting the various vector sizes for SVE which will only fail if the PR_SVE_SET_VL can't reduce the user-space vector length by powers of 2. However we will also be able to use it in a future test which exercises the GDB stub. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-25-alex.bennee@linaro.org>
2020-03-16 18:21:51 +01:00
# SVE ioctl test
AARCH64_TESTS += sve-ioctls
sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
tests/tcg/aarch64: add a gdbstub testcase for SVE registers A very simple test case which sets and reads SVE registers while running a test case. We don't really need to compile a SVE binary for this case but we will later so keep it simple for now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-24-alex.bennee@linaro.org>
2020-03-16 18:21:50 +01:00
ifneq ($(HAVE_GDB_BIN),)
GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
run-gdbstub-sysregs: sysregs
$(call run-test, $@, $(GDB_SCRIPT) \
--gdb $(HAVE_GDB_BIN) \
--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
"basic gdbstub SVE support")
tests/tcg/aarch64: add test-sve-ioctl guest-debug test This test exercises the gdbstub while runing the sve-iotcl test. I haven't plubmed it into make system as we need a way of verifying if gdb has the right support for SVE. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200316172155.971-26-alex.bennee@linaro.org>
2020-03-16 18:21:52 +01:00
run-gdbstub-sve-ioctls: sve-ioctls
$(call run-test, $@, $(GDB_SCRIPT) \
--gdb $(HAVE_GDB_BIN) \
--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve-ioctl.py, \
"basic gdbstub SVE ZLEN support")
tests/tcg: add a multiarch linux-user gdb test When the gdbstub code was converted to the new API we missed a few snafus in the various guests. Add a simple gdb test script which can be used on all our linux-user guests to check for obvious failures. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200430190122.4592-9-alex.bennee@linaro.org>
2020-04-30 21:01:21 +02:00
EXTRA_RUNS += run-gdbstub-sysregs run-gdbstub-sve-ioctls
tests/tcg/aarch64: add a gdbstub testcase for SVE registers A very simple test case which sets and reads SVE registers while running a test case. We don't really need to compile a SVE binary for this case but we will later so keep it simple for now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-24-alex.bennee@linaro.org>
2020-03-16 18:21:50 +01:00
endif
tests/tcg/aarch64: userspace system register test This tests a bunch of registers that the kernel allows userspace to read including the CPUID registers. We need a SVE aware compiler as we are testing the id_aa64zfr0_el1 register in the set. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-21-alex.bennee@linaro.org>
2020-03-16 18:21:47 +01:00
endif
tests/tcg: cleanup Makefile inclusions Rename Makefile.probe to Makefile.prereqs and make it actually define rules for the tests. Rename Makefile to Makefile.target, since it is not a toplevel makefile. Rename Makefile.include to Makefile.qemu and disentangle it from the QEMU Makefile.target, so that it is invoked recursively by tests/Makefile.include. Tests are now placed in tests/tcg/$(TARGET). Drop the usage of TARGET_BASE_ARCH, which is ignored by everything except x86_64 and aarch64. Fix x86 tests by using -cpu max and, while at it, standardize on QEMU_OPTS for aarch64 tests too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20190807143523.15917-3-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-08-07 16:35:22 +02:00
TESTS += $(AARCH64_TESTS)
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