2012-07-20 09:50:39 +02:00
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/*
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* OpenRISC Machine
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*
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* Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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2016-01-26 19:17:22 +01:00
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#include "qemu/osdep.h"
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2016-03-15 16:58:45 +01:00
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#include "qemu-common.h"
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#include "cpu.h"
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2012-07-20 09:50:39 +02:00
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#include "hw/hw.h"
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#include "hw/boards.h"
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2016-03-15 12:51:18 +01:00
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#include "migration/cpu.h"
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2012-07-20 09:50:39 +02:00
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2017-04-16 12:44:58 +02:00
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static int env_post_load(void *opaque, int version_id)
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{
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CPUOpenRISCState *env = opaque;
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/* Restore MMU handlers */
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if (env->sr & SR_DME) {
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env->tlb->cpu_openrisc_map_address_data =
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&cpu_openrisc_get_phys_data;
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} else {
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env->tlb->cpu_openrisc_map_address_data =
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&cpu_openrisc_get_phys_nommu;
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}
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if (env->sr & SR_IME) {
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env->tlb->cpu_openrisc_map_address_code =
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&cpu_openrisc_get_phys_code;
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} else {
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env->tlb->cpu_openrisc_map_address_code =
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&cpu_openrisc_get_phys_nommu;
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}
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return 0;
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}
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static const VMStateDescription vmstate_tlb_entry = {
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.name = "tlb_entry",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINTTL(mr, OpenRISCTLBEntry),
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VMSTATE_UINTTL(tr, OpenRISCTLBEntry),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription vmstate_cpu_tlb = {
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.name = "cpu_tlb",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT_2DARRAY(itlb, CPUOpenRISCTLBContext,
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ITLB_WAYS, ITLB_SIZE, 0,
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vmstate_tlb_entry, OpenRISCTLBEntry),
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VMSTATE_STRUCT_2DARRAY(dtlb, CPUOpenRISCTLBContext,
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DTLB_WAYS, DTLB_SIZE, 0,
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vmstate_tlb_entry, OpenRISCTLBEntry),
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VMSTATE_END_OF_LIST()
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}
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};
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#define VMSTATE_CPU_TLB(_f, _s) \
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VMSTATE_STRUCT_POINTER(_f, _s, vmstate_cpu_tlb, CPUOpenRISCTLBContext)
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2015-02-18 20:45:54 +01:00
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static int get_sr(QEMUFile *f, void *opaque, size_t size, VMStateField *field)
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{
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CPUOpenRISCState *env = opaque;
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cpu_set_sr(env, qemu_get_be32(f));
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return 0;
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}
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static int put_sr(QEMUFile *f, void *opaque, size_t size,
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VMStateField *field, QJSON *vmdesc)
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{
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CPUOpenRISCState *env = opaque;
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qemu_put_be32(f, cpu_get_sr(env));
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return 0;
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}
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static const VMStateInfo vmstate_sr = {
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.name = "sr",
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.get = get_sr,
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.put = put_sr,
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};
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2013-02-02 13:59:05 +01:00
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static const VMStateDescription vmstate_env = {
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.name = "env",
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2017-04-16 12:44:58 +02:00
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.version_id = 6,
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.minimum_version_id = 6,
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.post_load = env_post_load,
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2012-07-20 09:50:39 +02:00
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.fields = (VMStateField[]) {
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2017-04-05 23:44:56 +02:00
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VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
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2015-02-19 07:19:18 +01:00
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VMSTATE_UINTTL(pc, CPUOpenRISCState),
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VMSTATE_UINTTL(ppc, CPUOpenRISCState),
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VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
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VMSTATE_UINTTL(lock_addr, CPUOpenRISCState),
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VMSTATE_UINTTL(lock_value, CPUOpenRISCState),
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VMSTATE_UINTTL(epcr, CPUOpenRISCState),
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VMSTATE_UINTTL(eear, CPUOpenRISCState),
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2015-02-18 20:45:54 +01:00
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/* Save the architecture value of the SR, not the internally
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expanded version. Since this architecture value does not
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exist in memory to be stored, this requires a but of hoop
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jumping. We want OFFSET=0 so that we effectively pass ENV
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to the helper functions, and we need to fill in the name by
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hand since there's no field of that name. */
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{
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.name = "sr",
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.version_id = 0,
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.size = sizeof(uint32_t),
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.info = &vmstate_sr,
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.flags = VMS_SINGLE,
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.offset = 0
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},
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2015-02-19 07:19:18 +01:00
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VMSTATE_UINT32(vr, CPUOpenRISCState),
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VMSTATE_UINT32(upr, CPUOpenRISCState),
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VMSTATE_UINT32(cpucfgr, CPUOpenRISCState),
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VMSTATE_UINT32(dmmucfgr, CPUOpenRISCState),
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VMSTATE_UINT32(immucfgr, CPUOpenRISCState),
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2017-04-16 12:44:58 +02:00
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VMSTATE_UINT32(evbar, CPUOpenRISCState),
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2017-04-23 23:07:42 +02:00
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VMSTATE_UINT32(pmr, CPUOpenRISCState),
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2012-07-20 09:50:39 +02:00
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VMSTATE_UINT32(esr, CPUOpenRISCState),
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VMSTATE_UINT32(fpcsr, CPUOpenRISCState),
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2015-02-19 00:05:05 +01:00
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VMSTATE_UINT64(mac, CPUOpenRISCState),
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2017-04-16 12:44:58 +02:00
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VMSTATE_CPU_TLB(tlb, CPUOpenRISCState),
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VMSTATE_TIMER_PTR(timer, CPUOpenRISCState),
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VMSTATE_UINT32(ttmr, CPUOpenRISCState),
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VMSTATE_UINT32(picmr, CPUOpenRISCState),
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VMSTATE_UINT32(picsr, CPUOpenRISCState),
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2012-07-20 09:50:39 +02:00
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VMSTATE_END_OF_LIST()
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}
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};
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2013-02-02 13:59:05 +01:00
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const VMStateDescription vmstate_openrisc_cpu = {
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.name = "cpu",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_CPU(),
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VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState),
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VMSTATE_END_OF_LIST()
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}
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};
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