2003-06-27 19:34:32 +02:00
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/*
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* gdb server stub
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*
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2005-07-02 16:31:34 +02:00
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* Copyright (c) 2003-2005 Fabrice Bellard
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2003-06-27 19:34:32 +02:00
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2006-06-17 20:30:42 +02:00
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#include "config.h"
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2005-04-17 21:16:13 +02:00
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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2006-06-17 20:30:42 +02:00
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#include <fcntl.h>
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2005-04-17 21:16:13 +02:00
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#include "qemu.h"
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#else
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2004-04-01 01:37:16 +02:00
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#include "vl.h"
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2005-04-17 21:16:13 +02:00
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#endif
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2004-04-01 01:37:16 +02:00
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2006-06-14 17:21:14 +02:00
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#include "qemu_socket.h"
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#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5
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#endif
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#ifndef SIGINT
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#define SIGINT 2
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#endif
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#else
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2003-06-27 19:34:32 +02:00
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#include <signal.h>
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2006-06-14 17:21:14 +02:00
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#endif
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2003-06-27 19:34:32 +02:00
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2003-07-26 20:01:58 +02:00
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//#define DEBUG_GDB
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2003-06-27 19:34:32 +02:00
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2004-03-31 20:52:07 +02:00
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enum RSState {
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RS_IDLE,
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RS_GETLINE,
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RS_CHKSUM1,
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RS_CHKSUM2,
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};
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2005-04-17 21:16:13 +02:00
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/* XXX: This is not thread safe. Do we care? */
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static int gdbserver_fd = -1;
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2003-06-27 19:34:32 +02:00
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2004-03-31 20:52:07 +02:00
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typedef struct GDBState {
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2005-11-22 00:25:50 +01:00
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CPUState *env; /* current CPU */
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2005-04-24 12:07:11 +02:00
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enum RSState state; /* parsing state */
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2004-03-31 20:52:07 +02:00
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int fd;
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char line_buf[4096];
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int line_buf_index;
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int line_csum;
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2005-04-24 12:07:11 +02:00
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#ifdef CONFIG_USER_ONLY
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int running_state;
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#endif
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2004-03-31 20:52:07 +02:00
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} GDBState;
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2003-06-27 19:34:32 +02:00
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2005-04-17 21:16:13 +02:00
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#ifdef CONFIG_USER_ONLY
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/* XXX: remove this hack. */
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static GDBState gdbserver_state;
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#endif
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2004-03-31 20:52:07 +02:00
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static int get_char(GDBState *s)
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2003-06-27 19:34:32 +02:00
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{
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uint8_t ch;
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int ret;
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for(;;) {
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2006-06-14 17:21:14 +02:00
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ret = recv(s->fd, &ch, 1, 0);
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2003-06-27 19:34:32 +02:00
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if (ret < 0) {
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if (errno != EINTR && errno != EAGAIN)
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return -1;
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} else if (ret == 0) {
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return -1;
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} else {
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break;
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}
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}
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return ch;
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}
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2004-03-31 20:52:07 +02:00
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static void put_buffer(GDBState *s, const uint8_t *buf, int len)
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2003-06-27 19:34:32 +02:00
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{
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int ret;
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while (len > 0) {
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2006-06-14 17:21:14 +02:00
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ret = send(s->fd, buf, len, 0);
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2003-06-27 19:34:32 +02:00
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if (ret < 0) {
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if (errno != EINTR && errno != EAGAIN)
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return;
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} else {
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buf += ret;
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len -= ret;
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}
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}
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}
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static inline int fromhex(int v)
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{
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if (v >= '0' && v <= '9')
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return v - '0';
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else if (v >= 'A' && v <= 'F')
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return v - 'A' + 10;
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else if (v >= 'a' && v <= 'f')
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return v - 'a' + 10;
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else
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return 0;
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}
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static inline int tohex(int v)
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{
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if (v < 10)
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return v + '0';
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else
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return v - 10 + 'a';
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}
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static void memtohex(char *buf, const uint8_t *mem, int len)
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{
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int i, c;
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char *q;
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q = buf;
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for(i = 0; i < len; i++) {
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c = mem[i];
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*q++ = tohex(c >> 4);
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*q++ = tohex(c & 0xf);
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}
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*q = '\0';
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}
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static void hextomem(uint8_t *mem, const char *buf, int len)
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{
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int i;
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for(i = 0; i < len; i++) {
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mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
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buf += 2;
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}
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}
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/* return -1 if error, 0 if OK */
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2004-03-31 20:52:07 +02:00
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static int put_packet(GDBState *s, char *buf)
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2003-06-27 19:34:32 +02:00
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{
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char buf1[3];
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int len, csum, ch, i;
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#ifdef DEBUG_GDB
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printf("reply='%s'\n", buf);
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#endif
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for(;;) {
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buf1[0] = '$';
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2004-03-31 20:52:07 +02:00
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put_buffer(s, buf1, 1);
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2003-06-27 19:34:32 +02:00
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len = strlen(buf);
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2004-03-31 20:52:07 +02:00
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put_buffer(s, buf, len);
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2003-06-27 19:34:32 +02:00
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csum = 0;
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for(i = 0; i < len; i++) {
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csum += buf[i];
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}
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buf1[0] = '#';
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buf1[1] = tohex((csum >> 4) & 0xf);
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buf1[2] = tohex((csum) & 0xf);
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2004-03-31 20:52:07 +02:00
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put_buffer(s, buf1, 3);
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2003-06-27 19:34:32 +02:00
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2004-03-31 20:52:07 +02:00
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ch = get_char(s);
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2003-06-27 19:34:32 +02:00
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if (ch < 0)
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return -1;
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if (ch == '+')
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break;
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}
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return 0;
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}
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2004-01-04 16:48:38 +01:00
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#if defined(TARGET_I386)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
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{
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2004-10-01 00:22:08 +02:00
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uint32_t *registers = (uint32_t *)mem_buf;
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2004-01-04 16:48:38 +01:00
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int i, fpus;
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for(i = 0; i < 8; i++) {
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2004-10-01 00:22:08 +02:00
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registers[i] = env->regs[i];
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2004-01-04 16:48:38 +01:00
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}
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2004-10-01 00:22:08 +02:00
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registers[8] = env->eip;
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registers[9] = env->eflags;
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registers[10] = env->segs[R_CS].selector;
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registers[11] = env->segs[R_SS].selector;
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registers[12] = env->segs[R_DS].selector;
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registers[13] = env->segs[R_ES].selector;
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registers[14] = env->segs[R_FS].selector;
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registers[15] = env->segs[R_GS].selector;
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2004-01-04 16:48:38 +01:00
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/* XXX: convert floats */
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for(i = 0; i < 8; i++) {
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memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
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}
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2004-10-01 00:22:08 +02:00
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registers[36] = env->fpuc;
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2004-01-04 16:48:38 +01:00
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fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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2004-10-01 00:22:08 +02:00
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registers[37] = fpus;
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registers[38] = 0; /* XXX: convert tags */
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registers[39] = 0; /* fiseg */
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registers[40] = 0; /* fioff */
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registers[41] = 0; /* foseg */
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registers[42] = 0; /* fooff */
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registers[43] = 0; /* fop */
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for(i = 0; i < 16; i++)
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tswapls(®isters[i]);
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for(i = 36; i < 44; i++)
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tswapls(®isters[i]);
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2004-01-04 16:48:38 +01:00
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return 44 * 4;
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}
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static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
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{
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uint32_t *registers = (uint32_t *)mem_buf;
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int i;
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for(i = 0; i < 8; i++) {
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env->regs[i] = tswapl(registers[i]);
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}
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2004-10-01 00:22:08 +02:00
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env->eip = tswapl(registers[8]);
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env->eflags = tswapl(registers[9]);
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2004-01-04 16:48:38 +01:00
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#if defined(CONFIG_USER_ONLY)
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#define LOAD_SEG(index, sreg)\
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if (tswapl(registers[index]) != env->segs[sreg].selector)\
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cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
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LOAD_SEG(10, R_CS);
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LOAD_SEG(11, R_SS);
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LOAD_SEG(12, R_DS);
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LOAD_SEG(13, R_ES);
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LOAD_SEG(14, R_FS);
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LOAD_SEG(15, R_GS);
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#endif
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}
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2004-01-05 23:49:06 +01:00
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#elif defined (TARGET_PPC)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
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{
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2004-04-12 22:39:29 +02:00
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uint32_t *registers = (uint32_t *)mem_buf, tmp;
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2004-01-05 23:49:06 +01:00
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int i;
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/* fill in gprs */
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2004-04-12 22:39:29 +02:00
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for(i = 0; i < 32; i++) {
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2004-10-01 00:22:08 +02:00
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registers[i] = tswapl(env->gpr[i]);
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2004-01-05 23:49:06 +01:00
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}
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/* fill in fprs */
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for (i = 0; i < 32; i++) {
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2004-10-01 00:22:08 +02:00
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registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
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registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
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2004-01-05 23:49:06 +01:00
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}
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/* nip, msr, ccr, lnk, ctr, xer, mq */
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2004-10-01 00:22:08 +02:00
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registers[96] = tswapl(env->nip);
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2005-07-02 22:59:34 +02:00
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registers[97] = tswapl(do_load_msr(env));
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2004-01-05 23:49:06 +01:00
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tmp = 0;
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for (i = 0; i < 8; i++)
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2004-04-12 22:39:29 +02:00
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tmp |= env->crf[i] << (32 - ((i + 1) * 4));
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2004-10-01 00:22:08 +02:00
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registers[98] = tswapl(tmp);
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registers[99] = tswapl(env->lr);
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registers[100] = tswapl(env->ctr);
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2005-07-02 22:59:34 +02:00
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registers[101] = tswapl(do_load_xer(env));
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2004-10-01 00:22:08 +02:00
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registers[102] = 0;
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2004-04-12 22:39:29 +02:00
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return 103 * 4;
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2004-01-05 23:49:06 +01:00
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}
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static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
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{
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uint32_t *registers = (uint32_t *)mem_buf;
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int i;
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/* fill in gprs */
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for (i = 0; i < 32; i++) {
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2004-10-01 00:22:08 +02:00
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env->gpr[i] = tswapl(registers[i]);
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2004-01-05 23:49:06 +01:00
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}
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/* fill in fprs */
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for (i = 0; i < 32; i++) {
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2004-10-01 00:22:08 +02:00
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*((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
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*((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
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2004-01-05 23:49:06 +01:00
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}
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/* nip, msr, ccr, lnk, ctr, xer, mq */
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2004-10-01 00:22:08 +02:00
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env->nip = tswapl(registers[96]);
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2005-07-02 22:59:34 +02:00
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do_store_msr(env, tswapl(registers[97]));
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2004-10-01 00:22:08 +02:00
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registers[98] = tswapl(registers[98]);
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2004-01-05 23:49:06 +01:00
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for (i = 0; i < 8; i++)
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2004-04-12 22:39:29 +02:00
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env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
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2004-10-01 00:22:08 +02:00
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env->lr = tswapl(registers[99]);
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env->ctr = tswapl(registers[100]);
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2005-07-02 22:59:34 +02:00
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do_store_xer(env, tswapl(registers[101]));
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2004-10-01 00:22:08 +02:00
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}
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#elif defined (TARGET_SPARC)
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static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
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{
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2005-07-02 16:31:34 +02:00
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|
|
target_ulong *registers = (target_ulong *)mem_buf;
|
2004-10-01 00:22:08 +02:00
|
|
|
int i;
|
|
|
|
|
|
|
|
/* fill in g0..g7 */
|
2005-10-30 17:08:23 +01:00
|
|
|
for(i = 0; i < 8; i++) {
|
2004-10-01 00:22:08 +02:00
|
|
|
registers[i] = tswapl(env->gregs[i]);
|
|
|
|
}
|
|
|
|
/* fill in register window */
|
|
|
|
for(i = 0; i < 24; i++) {
|
|
|
|
registers[i + 8] = tswapl(env->regwptr[i]);
|
|
|
|
}
|
2006-06-25 17:32:37 +02:00
|
|
|
#ifndef TARGET_SPARC64
|
2004-10-01 00:22:08 +02:00
|
|
|
/* fill in fprs */
|
|
|
|
for (i = 0; i < 32; i++) {
|
|
|
|
registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
|
|
|
|
}
|
|
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
|
|
|
registers[64] = tswapl(env->y);
|
2005-07-02 16:31:34 +02:00
|
|
|
{
|
|
|
|
target_ulong tmp;
|
|
|
|
|
|
|
|
tmp = GET_PSR(env);
|
|
|
|
registers[65] = tswapl(tmp);
|
|
|
|
}
|
2004-10-01 00:22:08 +02:00
|
|
|
registers[66] = tswapl(env->wim);
|
|
|
|
registers[67] = tswapl(env->tbr);
|
|
|
|
registers[68] = tswapl(env->pc);
|
|
|
|
registers[69] = tswapl(env->npc);
|
|
|
|
registers[70] = tswapl(env->fsr);
|
|
|
|
registers[71] = 0; /* csr */
|
|
|
|
registers[72] = 0;
|
2005-07-02 16:31:34 +02:00
|
|
|
return 73 * sizeof(target_ulong);
|
|
|
|
#else
|
2006-06-25 17:32:37 +02:00
|
|
|
/* fill in fprs */
|
|
|
|
for (i = 0; i < 64; i += 2) {
|
|
|
|
uint64_t tmp;
|
|
|
|
|
|
|
|
tmp = (uint64_t)tswap32(*((uint32_t *)&env->fpr[i])) << 32;
|
|
|
|
tmp |= tswap32(*((uint32_t *)&env->fpr[i + 1]));
|
|
|
|
registers[i/2 + 32] = tmp;
|
2005-07-02 16:31:34 +02:00
|
|
|
}
|
2006-06-25 17:32:37 +02:00
|
|
|
registers[64] = tswapl(env->pc);
|
|
|
|
registers[65] = tswapl(env->npc);
|
|
|
|
registers[66] = tswapl(env->tstate[env->tl]);
|
|
|
|
registers[67] = tswapl(env->fsr);
|
|
|
|
registers[68] = tswapl(env->fprs);
|
|
|
|
registers[69] = tswapl(env->y);
|
|
|
|
return 70 * sizeof(target_ulong);
|
2005-07-02 16:31:34 +02:00
|
|
|
#endif
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
2005-07-02 16:31:34 +02:00
|
|
|
target_ulong *registers = (target_ulong *)mem_buf;
|
2004-10-01 00:22:08 +02:00
|
|
|
int i;
|
|
|
|
|
|
|
|
/* fill in g0..g7 */
|
|
|
|
for(i = 0; i < 7; i++) {
|
|
|
|
env->gregs[i] = tswapl(registers[i]);
|
|
|
|
}
|
|
|
|
/* fill in register window */
|
|
|
|
for(i = 0; i < 24; i++) {
|
2005-07-02 16:31:34 +02:00
|
|
|
env->regwptr[i] = tswapl(registers[i + 8]);
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2006-06-25 17:32:37 +02:00
|
|
|
#ifndef TARGET_SPARC64
|
2004-10-01 00:22:08 +02:00
|
|
|
/* fill in fprs */
|
|
|
|
for (i = 0; i < 32; i++) {
|
|
|
|
*((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
|
|
|
|
}
|
|
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
|
|
|
env->y = tswapl(registers[64]);
|
2004-12-20 00:18:01 +01:00
|
|
|
PUT_PSR(env, tswapl(registers[65]));
|
2004-10-01 00:22:08 +02:00
|
|
|
env->wim = tswapl(registers[66]);
|
|
|
|
env->tbr = tswapl(registers[67]);
|
|
|
|
env->pc = tswapl(registers[68]);
|
|
|
|
env->npc = tswapl(registers[69]);
|
|
|
|
env->fsr = tswapl(registers[70]);
|
2005-07-02 16:31:34 +02:00
|
|
|
#else
|
2006-06-25 17:32:37 +02:00
|
|
|
for (i = 0; i < 64; i += 2) {
|
|
|
|
*((uint32_t *)&env->fpr[i]) = tswap32(registers[i/2 + 32] >> 32);
|
|
|
|
*((uint32_t *)&env->fpr[i + 1]) = tswap32(registers[i/2 + 32] & 0xffffffff);
|
2005-07-02 16:31:34 +02:00
|
|
|
}
|
2006-06-25 17:32:37 +02:00
|
|
|
env->pc = tswapl(registers[64]);
|
|
|
|
env->npc = tswapl(registers[65]);
|
|
|
|
env->tstate[env->tl] = tswapl(registers[66]);
|
|
|
|
env->fsr = tswapl(registers[67]);
|
|
|
|
env->fprs = tswapl(registers[68]);
|
|
|
|
env->y = tswapl(registers[69]);
|
2005-07-02 16:31:34 +02:00
|
|
|
#endif
|
2004-01-05 23:49:06 +01:00
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#elif defined (TARGET_ARM)
|
|
|
|
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
/* 16 core integer registers (4 bytes each). */
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
{
|
|
|
|
*(uint32_t *)ptr = tswapl(env->regs[i]);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
/* 8 FPA registers (12 bytes each), FPS (4 bytes).
|
|
|
|
Not yet implemented. */
|
|
|
|
memset (ptr, 0, 8 * 12 + 4);
|
|
|
|
ptr += 8 * 12 + 4;
|
|
|
|
/* CPSR (4 bytes). */
|
2005-11-26 11:38:39 +01:00
|
|
|
*(uint32_t *)ptr = tswapl (cpsr_read(env));
|
2005-04-17 21:16:13 +02:00
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
return ptr - mem_buf;
|
|
|
|
}
|
2004-01-04 16:48:38 +01:00
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
/* Core integer registers. */
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
{
|
|
|
|
env->regs[i] = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
/* Ignore FPA regs and scr. */
|
|
|
|
ptr += 8 * 12 + 4;
|
2005-11-26 11:38:39 +01:00
|
|
|
cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
|
2005-04-17 21:16:13 +02:00
|
|
|
}
|
2006-10-22 02:18:54 +02:00
|
|
|
#elif defined (TARGET_M68K)
|
|
|
|
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
CPU_DoubleU u;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
/* D0-D7 */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
*(uint32_t *)ptr = tswapl(env->dregs[i]);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
/* A0-A7 */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
*(uint32_t *)ptr = tswapl(env->aregs[i]);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
*(uint32_t *)ptr = tswapl(env->sr);
|
|
|
|
ptr += 4;
|
|
|
|
*(uint32_t *)ptr = tswapl(env->pc);
|
|
|
|
ptr += 4;
|
|
|
|
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
|
|
|
ColdFire has 8-bit double precision registers. */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
u.d = env->fregs[i];
|
|
|
|
*(uint32_t *)ptr = tswap32(u.l.upper);
|
|
|
|
*(uint32_t *)ptr = tswap32(u.l.lower);
|
|
|
|
}
|
|
|
|
/* FP control regs (not implemented). */
|
|
|
|
memset (ptr, 0, 3 * 4);
|
|
|
|
ptr += 3 * 4;
|
|
|
|
|
|
|
|
return ptr - mem_buf;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
CPU_DoubleU u;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
/* D0-D7 */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
env->dregs[i] = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
/* A0-A7 */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
env->aregs[i] = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
env->sr = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
env->pc = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
/* F0-F7. The 68881/68040 have 12-bit extended precision registers.
|
|
|
|
ColdFire has 8-bit double precision registers. */
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
u.l.upper = tswap32(*(uint32_t *)ptr);
|
|
|
|
u.l.lower = tswap32(*(uint32_t *)ptr);
|
|
|
|
env->fregs[i] = u.d;
|
|
|
|
}
|
|
|
|
/* FP control regs (not implemented). */
|
|
|
|
ptr += 3 * 4;
|
|
|
|
}
|
2005-12-05 20:55:19 +01:00
|
|
|
#elif defined (TARGET_MIPS)
|
|
|
|
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
*(uint32_t *)ptr = tswapl(env->gpr[i]);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->CP0_Status);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->LO);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->HI);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->CP0_Cause);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->PC);
|
|
|
|
ptr += 4;
|
|
|
|
|
2006-12-11 20:22:27 +01:00
|
|
|
#ifdef MIPS_USES_FPU
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
*(uint32_t *)ptr = tswapl(FPR_W (env, i));
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->fcr31);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
*(uint32_t *)ptr = tswapl(env->fcr0);
|
|
|
|
ptr += 4;
|
|
|
|
#endif
|
|
|
|
|
2005-12-05 20:55:19 +01:00
|
|
|
/* 32 FP registers, fsr, fir, fp. Not yet implemented. */
|
2006-12-11 20:22:27 +01:00
|
|
|
/* what's 'fp' mean here? */
|
2005-12-05 20:55:19 +01:00
|
|
|
|
|
|
|
return ptr - mem_buf;
|
|
|
|
}
|
|
|
|
|
2006-12-11 20:22:27 +01:00
|
|
|
/* convert MIPS rounding mode in FCR31 to IEEE library */
|
|
|
|
static unsigned int ieee_rm[] =
|
|
|
|
{
|
|
|
|
float_round_nearest_even,
|
|
|
|
float_round_to_zero,
|
|
|
|
float_round_up,
|
|
|
|
float_round_down
|
|
|
|
};
|
|
|
|
#define RESTORE_ROUNDING_MODE \
|
|
|
|
set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
|
|
|
|
|
2005-12-05 20:55:19 +01:00
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint8_t *ptr;
|
|
|
|
|
|
|
|
ptr = mem_buf;
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
env->gpr[i] = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
env->CP0_Status = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->LO = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->HI = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->CP0_Cause = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->PC = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
2006-12-11 20:22:27 +01:00
|
|
|
|
|
|
|
#ifdef MIPS_USES_FPU
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
{
|
|
|
|
FPR_W (env, i) = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF;
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
env->fcr0 = tswapl(*(uint32_t *)ptr);
|
|
|
|
ptr += 4;
|
|
|
|
|
|
|
|
/* set rounding mode */
|
|
|
|
RESTORE_ROUNDING_MODE;
|
|
|
|
|
|
|
|
#ifndef CONFIG_SOFTFLOAT
|
|
|
|
/* no floating point exception for native float */
|
|
|
|
SET_FP_ENABLE(env->fcr31, 0);
|
|
|
|
#endif
|
|
|
|
#endif
|
2005-12-05 20:55:19 +01:00
|
|
|
}
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
|
|
|
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
|
|
|
|
{
|
|
|
|
uint32_t *ptr = (uint32_t *)mem_buf;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
#define SAVE(x) *ptr++=tswapl(x)
|
2006-06-18 21:12:54 +02:00
|
|
|
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
|
|
|
for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
|
|
|
|
} else {
|
|
|
|
for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
|
|
|
|
}
|
|
|
|
for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
|
2006-04-27 23:07:38 +02:00
|
|
|
SAVE (env->pc);
|
|
|
|
SAVE (env->pr);
|
|
|
|
SAVE (env->gbr);
|
|
|
|
SAVE (env->vbr);
|
|
|
|
SAVE (env->mach);
|
|
|
|
SAVE (env->macl);
|
|
|
|
SAVE (env->sr);
|
|
|
|
SAVE (0); /* TICKS */
|
|
|
|
SAVE (0); /* STALLS */
|
|
|
|
SAVE (0); /* CYCLES */
|
|
|
|
SAVE (0); /* INSTS */
|
|
|
|
SAVE (0); /* PLR */
|
|
|
|
|
|
|
|
return ((uint8_t *)ptr - mem_buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
|
|
|
uint32_t *ptr = (uint32_t *)mem_buf;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
#define LOAD(x) (x)=*ptr++;
|
2006-06-18 21:12:54 +02:00
|
|
|
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
|
|
|
for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
|
|
|
|
} else {
|
|
|
|
for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
|
|
|
|
}
|
|
|
|
for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
|
2006-04-27 23:07:38 +02:00
|
|
|
LOAD (env->pc);
|
|
|
|
LOAD (env->pr);
|
|
|
|
LOAD (env->gbr);
|
|
|
|
LOAD (env->vbr);
|
|
|
|
LOAD (env->mach);
|
|
|
|
LOAD (env->macl);
|
|
|
|
LOAD (env->sr);
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#else
|
2004-01-04 16:48:38 +01:00
|
|
|
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
2003-06-27 19:34:32 +02:00
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
|
2003-06-27 19:34:32 +02:00
|
|
|
{
|
|
|
|
const char *p;
|
2004-03-31 20:52:07 +02:00
|
|
|
int ch, reg_size, type;
|
2003-06-27 19:34:32 +02:00
|
|
|
char buf[4096];
|
|
|
|
uint8_t mem_buf[2000];
|
|
|
|
uint32_t *registers;
|
2006-06-25 17:32:37 +02:00
|
|
|
target_ulong addr, len;
|
2003-06-27 19:34:32 +02:00
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
#ifdef DEBUG_GDB
|
|
|
|
printf("command='%s'\n", line_buf);
|
|
|
|
#endif
|
|
|
|
p = line_buf;
|
|
|
|
ch = *p++;
|
|
|
|
switch(ch) {
|
|
|
|
case '?':
|
2005-04-17 21:16:13 +02:00
|
|
|
/* TODO: Make this return the correct value for user-mode. */
|
2004-03-31 20:52:07 +02:00
|
|
|
snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
case 'c':
|
|
|
|
if (*p != '\0') {
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2003-07-26 14:06:08 +02:00
|
|
|
#if defined(TARGET_I386)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->eip = addr;
|
2004-01-05 00:51:58 +01:00
|
|
|
#elif defined (TARGET_PPC)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->nip = addr;
|
2004-10-04 23:23:09 +02:00
|
|
|
#elif defined (TARGET_SPARC)
|
|
|
|
env->pc = addr;
|
|
|
|
env->npc = addr + 4;
|
2005-11-26 11:38:39 +01:00
|
|
|
#elif defined (TARGET_ARM)
|
|
|
|
env->regs[15] = addr;
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
|
|
|
env->pc = addr;
|
2003-07-26 14:06:08 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
2005-04-24 12:07:11 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
s->running_state = 1;
|
|
|
|
#else
|
|
|
|
vm_start();
|
|
|
|
#endif
|
|
|
|
return RS_IDLE;
|
2004-03-31 20:52:07 +02:00
|
|
|
case 's':
|
|
|
|
if (*p != '\0') {
|
|
|
|
addr = strtoul(p, (char **)&p, 16);
|
2003-07-29 22:50:33 +02:00
|
|
|
#if defined(TARGET_I386)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->eip = addr;
|
2004-01-05 00:51:58 +01:00
|
|
|
#elif defined (TARGET_PPC)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->nip = addr;
|
2004-10-04 23:23:09 +02:00
|
|
|
#elif defined (TARGET_SPARC)
|
|
|
|
env->pc = addr;
|
|
|
|
env->npc = addr + 4;
|
2005-11-26 11:38:39 +01:00
|
|
|
#elif defined (TARGET_ARM)
|
|
|
|
env->regs[15] = addr;
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
|
|
|
env->pc = addr;
|
2003-07-29 22:50:33 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
cpu_single_step(env, 1);
|
2005-04-24 12:07:11 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
s->running_state = 1;
|
|
|
|
#else
|
|
|
|
vm_start();
|
|
|
|
#endif
|
|
|
|
return RS_IDLE;
|
2004-03-31 20:52:07 +02:00
|
|
|
case 'g':
|
|
|
|
reg_size = cpu_gdb_read_registers(env, mem_buf);
|
|
|
|
memtohex(buf, mem_buf, reg_size);
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
case 'G':
|
|
|
|
registers = (void *)mem_buf;
|
|
|
|
len = strlen(p) / 2;
|
|
|
|
hextomem((uint8_t *)registers, p, len);
|
|
|
|
cpu_gdb_write_registers(env, mem_buf, len);
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
|
|
|
case 'm':
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, NULL, 16);
|
2005-12-05 20:55:19 +01:00
|
|
|
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
|
|
|
|
put_packet (s, "E14");
|
|
|
|
} else {
|
|
|
|
memtohex(buf, mem_buf, len);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
break;
|
|
|
|
case 'M':
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2005-01-17 23:03:16 +01:00
|
|
|
if (*p == ':')
|
2004-03-31 20:52:07 +02:00
|
|
|
p++;
|
|
|
|
hextomem(mem_buf, p, len);
|
|
|
|
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
|
2005-04-26 23:09:55 +02:00
|
|
|
put_packet(s, "E14");
|
2004-03-31 20:52:07 +02:00
|
|
|
else
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
|
|
|
case 'Z':
|
|
|
|
type = strtoul(p, (char **)&p, 16);
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (type == 0 || type == 1) {
|
|
|
|
if (cpu_breakpoint_insert(env, addr) < 0)
|
|
|
|
goto breakpoint_error;
|
|
|
|
put_packet(s, "OK");
|
|
|
|
} else {
|
|
|
|
breakpoint_error:
|
2005-04-26 23:09:55 +02:00
|
|
|
put_packet(s, "E22");
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 'z':
|
|
|
|
type = strtoul(p, (char **)&p, 16);
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (type == 0 || type == 1) {
|
|
|
|
cpu_breakpoint_remove(env, addr);
|
|
|
|
put_packet(s, "OK");
|
|
|
|
} else {
|
|
|
|
goto breakpoint_error;
|
|
|
|
}
|
|
|
|
break;
|
2006-06-17 20:30:42 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
case 'q':
|
|
|
|
if (strncmp(p, "Offsets", 7) == 0) {
|
|
|
|
TaskState *ts = env->opaque;
|
|
|
|
|
|
|
|
sprintf(buf, "Text=%x;Data=%x;Bss=%x", ts->info->code_offset,
|
|
|
|
ts->info->data_offset, ts->info->data_offset);
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* Fall through. */
|
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
default:
|
|
|
|
// unknown_command:
|
|
|
|
/* put empty packet */
|
|
|
|
buf[0] = '\0';
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return RS_IDLE;
|
|
|
|
}
|
|
|
|
|
2005-01-04 00:34:06 +01:00
|
|
|
extern void tb_flush(CPUState *env);
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2004-03-31 20:52:07 +02:00
|
|
|
static void gdb_vm_stopped(void *opaque, int reason)
|
|
|
|
{
|
|
|
|
GDBState *s = opaque;
|
|
|
|
char buf[256];
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* disable single step if it was enable */
|
2005-11-22 00:25:50 +01:00
|
|
|
cpu_single_step(s->env, 0);
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2004-12-20 00:18:01 +01:00
|
|
|
if (reason == EXCP_DEBUG) {
|
2005-11-22 00:25:50 +01:00
|
|
|
tb_flush(s->env);
|
2004-03-31 20:52:07 +02:00
|
|
|
ret = SIGTRAP;
|
2006-04-23 20:42:15 +02:00
|
|
|
} else if (reason == EXCP_INTERRUPT) {
|
|
|
|
ret = SIGINT;
|
|
|
|
} else {
|
2004-03-31 20:52:07 +02:00
|
|
|
ret = 0;
|
2006-04-23 20:42:15 +02:00
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
snprintf(buf, sizeof(buf), "S%02x", ret);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2005-11-22 00:25:50 +01:00
|
|
|
static void gdb_read_byte(GDBState *s, int ch)
|
2004-03-31 20:52:07 +02:00
|
|
|
{
|
2005-11-22 00:25:50 +01:00
|
|
|
CPUState *env = s->env;
|
2004-03-31 20:52:07 +02:00
|
|
|
int i, csum;
|
|
|
|
char reply[1];
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2004-03-31 20:52:07 +02:00
|
|
|
if (vm_running) {
|
|
|
|
/* when the CPU is running, we cannot do anything except stop
|
|
|
|
it when receiving a char */
|
|
|
|
vm_stop(EXCP_INTERRUPT);
|
2005-04-24 12:07:11 +02:00
|
|
|
} else
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2005-04-24 12:07:11 +02:00
|
|
|
{
|
2004-03-31 20:52:07 +02:00
|
|
|
switch(s->state) {
|
|
|
|
case RS_IDLE:
|
|
|
|
if (ch == '$') {
|
|
|
|
s->line_buf_index = 0;
|
|
|
|
s->state = RS_GETLINE;
|
2003-07-29 22:50:33 +02:00
|
|
|
}
|
2003-06-27 19:34:32 +02:00
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case RS_GETLINE:
|
|
|
|
if (ch == '#') {
|
|
|
|
s->state = RS_CHKSUM1;
|
|
|
|
} else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
|
|
|
|
s->state = RS_IDLE;
|
2003-07-26 14:06:08 +02:00
|
|
|
} else {
|
2004-03-31 20:52:07 +02:00
|
|
|
s->line_buf[s->line_buf_index++] = ch;
|
2003-07-26 14:06:08 +02:00
|
|
|
}
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case RS_CHKSUM1:
|
|
|
|
s->line_buf[s->line_buf_index] = '\0';
|
|
|
|
s->line_csum = fromhex(ch) << 4;
|
|
|
|
s->state = RS_CHKSUM2;
|
|
|
|
break;
|
|
|
|
case RS_CHKSUM2:
|
|
|
|
s->line_csum |= fromhex(ch);
|
|
|
|
csum = 0;
|
|
|
|
for(i = 0; i < s->line_buf_index; i++) {
|
|
|
|
csum += s->line_buf[i];
|
|
|
|
}
|
|
|
|
if (s->line_csum != (csum & 0xff)) {
|
|
|
|
reply[0] = '-';
|
|
|
|
put_buffer(s, reply, 1);
|
|
|
|
s->state = RS_IDLE;
|
2003-07-26 14:06:08 +02:00
|
|
|
} else {
|
2004-03-31 20:52:07 +02:00
|
|
|
reply[0] = '+';
|
|
|
|
put_buffer(s, reply, 1);
|
2005-04-17 21:16:13 +02:00
|
|
|
s->state = gdb_handle_packet(s, env, s->line_buf);
|
2003-07-26 14:06:08 +02:00
|
|
|
}
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
int
|
|
|
|
gdb_handlesig (CPUState *env, int sig)
|
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
char buf[256];
|
|
|
|
int n;
|
|
|
|
|
|
|
|
if (gdbserver_fd < 0)
|
|
|
|
return sig;
|
|
|
|
|
|
|
|
s = &gdbserver_state;
|
|
|
|
|
|
|
|
/* disable single step if it was enabled */
|
|
|
|
cpu_single_step(env, 0);
|
|
|
|
tb_flush(env);
|
|
|
|
|
|
|
|
if (sig != 0)
|
|
|
|
{
|
|
|
|
snprintf(buf, sizeof(buf), "S%02x", sig);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
sig = 0;
|
|
|
|
s->state = RS_IDLE;
|
2005-04-24 12:07:11 +02:00
|
|
|
s->running_state = 0;
|
|
|
|
while (s->running_state == 0) {
|
2005-04-17 21:16:13 +02:00
|
|
|
n = read (s->fd, buf, 256);
|
|
|
|
if (n > 0)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < n; i++)
|
2005-11-22 00:25:50 +01:00
|
|
|
gdb_read_byte (s, buf[i]);
|
2005-04-17 21:16:13 +02:00
|
|
|
}
|
|
|
|
else if (n == 0 || errno != EAGAIN)
|
|
|
|
{
|
|
|
|
/* XXX: Connection closed. Should probably wait for annother
|
|
|
|
connection before continuing. */
|
|
|
|
return sig;
|
|
|
|
}
|
2005-04-24 12:07:11 +02:00
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
return sig;
|
|
|
|
}
|
2005-04-26 22:42:36 +02:00
|
|
|
|
|
|
|
/* Tell the remote gdb that the process has exited. */
|
|
|
|
void gdb_exit(CPUState *env, int code)
|
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
char buf[4];
|
|
|
|
|
|
|
|
if (gdbserver_fd < 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
s = &gdbserver_state;
|
|
|
|
|
|
|
|
snprintf(buf, sizeof(buf), "W%02x", code);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#else
|
2005-11-15 23:16:05 +01:00
|
|
|
static void gdb_read(void *opaque)
|
2004-03-31 20:52:07 +02:00
|
|
|
{
|
|
|
|
GDBState *s = opaque;
|
2005-11-15 23:16:05 +01:00
|
|
|
int i, size;
|
|
|
|
uint8_t buf[4096];
|
|
|
|
|
2006-06-14 17:21:14 +02:00
|
|
|
size = recv(s->fd, buf, sizeof(buf), 0);
|
2005-11-15 23:16:05 +01:00
|
|
|
if (size < 0)
|
|
|
|
return;
|
2004-03-31 20:52:07 +02:00
|
|
|
if (size == 0) {
|
|
|
|
/* end of connection */
|
|
|
|
qemu_del_vm_stop_handler(gdb_vm_stopped, s);
|
2005-11-15 23:16:05 +01:00
|
|
|
qemu_set_fd_handler(s->fd, NULL, NULL, NULL);
|
2004-03-31 20:52:07 +02:00
|
|
|
qemu_free(s);
|
|
|
|
vm_start();
|
|
|
|
} else {
|
|
|
|
for(i = 0; i < size; i++)
|
2005-11-22 00:25:50 +01:00
|
|
|
gdb_read_byte(s, buf[i]);
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
|
|
|
|
2005-11-15 23:16:05 +01:00
|
|
|
static void gdb_accept(void *opaque)
|
2004-03-31 20:52:07 +02:00
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
struct sockaddr_in sockaddr;
|
|
|
|
socklen_t len;
|
|
|
|
int val, fd;
|
|
|
|
|
|
|
|
for(;;) {
|
|
|
|
len = sizeof(sockaddr);
|
|
|
|
fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
|
|
|
|
if (fd < 0 && errno != EINTR) {
|
|
|
|
perror("accept");
|
|
|
|
return;
|
|
|
|
} else if (fd >= 0) {
|
2003-06-27 19:34:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
|
|
|
|
/* set short latency */
|
|
|
|
val = 1;
|
2006-06-14 17:21:14 +02:00
|
|
|
setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
s = &gdbserver_state;
|
|
|
|
memset (s, 0, sizeof (GDBState));
|
|
|
|
#else
|
2004-03-31 20:52:07 +02:00
|
|
|
s = qemu_mallocz(sizeof(GDBState));
|
|
|
|
if (!s) {
|
|
|
|
close(fd);
|
|
|
|
return;
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2005-11-22 00:25:50 +01:00
|
|
|
s->env = first_cpu; /* XXX: allow to change CPU */
|
2004-03-31 20:52:07 +02:00
|
|
|
s->fd = fd;
|
|
|
|
|
2006-06-14 17:21:14 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
2004-03-31 20:52:07 +02:00
|
|
|
fcntl(fd, F_SETFL, O_NONBLOCK);
|
2006-06-14 17:21:14 +02:00
|
|
|
#else
|
|
|
|
socket_set_nonblock(fd);
|
2004-03-31 20:52:07 +02:00
|
|
|
|
|
|
|
/* stop the VM */
|
|
|
|
vm_stop(EXCP_INTERRUPT);
|
|
|
|
|
|
|
|
/* start handling I/O */
|
2005-11-15 23:16:05 +01:00
|
|
|
qemu_set_fd_handler(s->fd, gdb_read, NULL, s);
|
2004-03-31 20:52:07 +02:00
|
|
|
/* when the VM is stopped, the following callback is called */
|
|
|
|
qemu_add_vm_stop_handler(gdb_vm_stopped, s);
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int gdbserver_open(int port)
|
|
|
|
{
|
|
|
|
struct sockaddr_in sockaddr;
|
|
|
|
int fd, val, ret;
|
|
|
|
|
|
|
|
fd = socket(PF_INET, SOCK_STREAM, 0);
|
|
|
|
if (fd < 0) {
|
|
|
|
perror("socket");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* allow fast reuse */
|
|
|
|
val = 1;
|
2006-06-14 17:21:14 +02:00
|
|
|
setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
|
2004-03-31 20:52:07 +02:00
|
|
|
|
|
|
|
sockaddr.sin_family = AF_INET;
|
|
|
|
sockaddr.sin_port = htons(port);
|
|
|
|
sockaddr.sin_addr.s_addr = 0;
|
|
|
|
ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
|
|
|
|
if (ret < 0) {
|
|
|
|
perror("bind");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
ret = listen(fd, 0);
|
|
|
|
if (ret < 0) {
|
|
|
|
perror("listen");
|
|
|
|
return -1;
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2006-06-14 17:21:14 +02:00
|
|
|
socket_set_nonblock(fd);
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
return fd;
|
|
|
|
}
|
|
|
|
|
|
|
|
int gdbserver_start(int port)
|
|
|
|
{
|
|
|
|
gdbserver_fd = gdbserver_open(port);
|
|
|
|
if (gdbserver_fd < 0)
|
|
|
|
return -1;
|
|
|
|
/* accept connections */
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
2005-11-15 23:16:05 +01:00
|
|
|
gdb_accept (NULL);
|
2005-04-17 21:16:13 +02:00
|
|
|
#else
|
2005-11-15 23:16:05 +01:00
|
|
|
qemu_set_fd_handler(gdbserver_fd, gdb_accept, NULL, NULL);
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2003-06-27 19:34:32 +02:00
|
|
|
return 0;
|
|
|
|
}
|