2008-05-07 16:41:37 +02:00
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/*
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* TI TSC2005 emulator.
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*
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* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
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* Copyright (C) 2008 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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2009-01-04 23:05:52 +01:00
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* You should have received a copy of the GNU General Public License along
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2009-07-16 22:47:01 +02:00
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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2008-05-07 16:41:37 +02:00
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*/
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2016-01-26 19:17:28 +01:00
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#include "qemu/osdep.h"
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2018-06-26 18:50:40 +02:00
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#include "qemu/log.h"
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2012-12-17 18:20:00 +01:00
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#include "qemu/timer.h"
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2019-08-12 07:23:38 +02:00
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#include "sysemu/reset.h"
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2012-11-28 12:06:30 +01:00
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#include "ui/console.h"
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2019-04-12 18:54:12 +02:00
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#include "hw/input/tsc2xxx.h"
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2019-08-12 07:23:42 +02:00
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#include "hw/irq.h"
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2019-08-12 07:23:45 +02:00
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#include "migration/vmstate.h"
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2018-06-21 19:12:52 +02:00
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#include "trace.h"
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2008-05-07 16:41:37 +02:00
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#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - (p ? 12 : 10)))
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2009-05-10 02:44:56 +02:00
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typedef struct {
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2008-05-07 16:41:37 +02:00
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qemu_irq pint; /* Combination of the nPENIRQ and DAV signals */
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QEMUTimer *timer;
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uint16_t model;
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2016-10-04 14:28:08 +02:00
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int32_t x, y;
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bool pressure;
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2008-05-07 16:41:37 +02:00
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2016-10-04 14:28:08 +02:00
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uint8_t reg, state;
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bool irq, command;
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2008-05-07 16:41:37 +02:00
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uint16_t data, dav;
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2016-10-04 14:28:08 +02:00
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bool busy;
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bool enabled;
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bool host_mode;
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int8_t function;
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int8_t nextfunction;
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bool precision;
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bool nextprecision;
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uint16_t filter;
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uint8_t pin_func;
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uint16_t timing[2];
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uint8_t noise;
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bool reset;
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bool pdst;
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bool pnd0;
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2008-05-07 16:41:37 +02:00
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uint16_t temp_thr[2];
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uint16_t aux_thr[2];
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2016-10-04 14:28:08 +02:00
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int32_t tr[8];
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2009-05-10 02:44:56 +02:00
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} TSC2005State;
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2008-05-07 16:41:37 +02:00
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enum {
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TSC_MODE_XYZ_SCAN = 0x0,
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TSC_MODE_XY_SCAN,
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TSC_MODE_X,
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TSC_MODE_Y,
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TSC_MODE_Z,
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TSC_MODE_AUX,
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TSC_MODE_TEMP1,
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TSC_MODE_TEMP2,
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TSC_MODE_AUX_SCAN,
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TSC_MODE_X_TEST,
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TSC_MODE_Y_TEST,
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TSC_MODE_TS_TEST,
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TSC_MODE_RESERVED,
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TSC_MODE_XX_DRV,
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TSC_MODE_YY_DRV,
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TSC_MODE_YX_DRV,
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};
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static const uint16_t mode_regs[16] = {
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0xf000, /* X, Y, Z scan */
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0xc000, /* X, Y scan */
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0x8000, /* X */
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0x4000, /* Y */
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0x3000, /* Z */
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0x0800, /* AUX */
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0x0400, /* TEMP1 */
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0x0200, /* TEMP2 */
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0x0800, /* AUX scan */
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0x0040, /* X test */
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0x0020, /* Y test */
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0x0080, /* Short-circuit test */
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0x0000, /* Reserved */
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0x0000, /* X+, X- drivers */
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0x0000, /* Y+, Y- drivers */
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0x0000, /* Y+, X- drivers */
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};
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#define X_TRANSFORM(s) \
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((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
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#define Y_TRANSFORM(s) \
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((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
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#define Z1_TRANSFORM(s) \
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((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
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#define Z2_TRANSFORM(s) \
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((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
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#define AUX_VAL (700 << 4) /* +/- 3 at 12-bit */
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#define TEMP1_VAL (1264 << 4) /* +/- 5 at 12-bit */
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#define TEMP2_VAL (1531 << 4) /* +/- 5 at 12-bit */
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2009-05-10 02:44:56 +02:00
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static uint16_t tsc2005_read(TSC2005State *s, int reg)
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2008-05-07 16:41:37 +02:00
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{
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uint16_t ret;
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switch (reg) {
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case 0x0: /* X */
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s->dav &= ~mode_regs[TSC_MODE_X];
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return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
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(s->noise & 3);
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case 0x1: /* Y */
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s->dav &= ~mode_regs[TSC_MODE_Y];
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s->noise ++;
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return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
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(s->noise & 3);
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case 0x2: /* Z1 */
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s->dav &= 0xdfff;
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return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
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(s->noise & 3);
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case 0x3: /* Z2 */
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s->dav &= 0xefff;
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return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
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(s->noise & 3);
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case 0x4: /* AUX */
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s->dav &= ~mode_regs[TSC_MODE_AUX];
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return TSC_CUT_RESOLUTION(AUX_VAL, s->precision);
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case 0x5: /* TEMP1 */
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s->dav &= ~mode_regs[TSC_MODE_TEMP1];
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return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
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(s->noise & 5);
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case 0x6: /* TEMP2 */
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s->dav &= 0xdfff;
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s->dav &= ~mode_regs[TSC_MODE_TEMP2];
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return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
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(s->noise & 3);
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case 0x7: /* Status */
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ret = s->dav | (s->reset << 7) | (s->pdst << 2) | 0x0;
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s->dav &= ~(mode_regs[TSC_MODE_X_TEST] | mode_regs[TSC_MODE_Y_TEST] |
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mode_regs[TSC_MODE_TS_TEST]);
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2016-10-04 14:28:08 +02:00
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s->reset = true;
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2008-05-07 16:41:37 +02:00
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return ret;
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case 0x8: /* AUX high treshold */
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return s->aux_thr[1];
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case 0x9: /* AUX low treshold */
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return s->aux_thr[0];
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case 0xa: /* TEMP high treshold */
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return s->temp_thr[1];
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case 0xb: /* TEMP low treshold */
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return s->temp_thr[0];
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case 0xc: /* CFR0 */
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return (s->pressure << 15) | ((!s->busy) << 14) |
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(s->nextprecision << 13) | s->timing[0];
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case 0xd: /* CFR1 */
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return s->timing[1];
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case 0xe: /* CFR2 */
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return (s->pin_func << 14) | s->filter;
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case 0xf: /* Function select status */
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return s->function >= 0 ? 1 << s->function : 0;
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}
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/* Never gets here */
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return 0xffff;
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}
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2009-05-10 02:44:56 +02:00
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static void tsc2005_write(TSC2005State *s, int reg, uint16_t data)
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2008-05-07 16:41:37 +02:00
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{
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switch (reg) {
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case 0x8: /* AUX high treshold */
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s->aux_thr[1] = data;
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break;
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case 0x9: /* AUX low treshold */
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s->aux_thr[0] = data;
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break;
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case 0xa: /* TEMP high treshold */
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s->temp_thr[1] = data;
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break;
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case 0xb: /* TEMP low treshold */
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s->temp_thr[0] = data;
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break;
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case 0xc: /* CFR0 */
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2016-10-04 14:28:08 +02:00
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s->host_mode = (data >> 15) != 0;
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2008-05-18 15:14:29 +02:00
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if (s->enabled != !(data & 0x4000)) {
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s->enabled = !(data & 0x4000);
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2018-06-21 19:12:52 +02:00
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trace_tsc2005_sense(s->enabled ? "enabled" : "disabled");
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2008-05-18 15:14:29 +02:00
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if (s->busy && !s->enabled)
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2013-08-21 17:03:08 +02:00
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timer_del(s->timer);
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2016-10-04 14:28:08 +02:00
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s->busy = s->busy && s->enabled;
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2008-05-18 15:14:29 +02:00
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}
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2008-05-07 16:41:37 +02:00
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s->nextprecision = (data >> 13) & 1;
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s->timing[0] = data & 0x1fff;
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2018-06-26 18:50:40 +02:00
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if ((s->timing[0] >> 11) == 3) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"tsc2005_write: illegal conversion clock setting\n");
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}
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2008-05-07 16:41:37 +02:00
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break;
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case 0xd: /* CFR1 */
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s->timing[1] = data & 0xf07;
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break;
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case 0xe: /* CFR2 */
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s->pin_func = (data >> 14) & 3;
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s->filter = data & 0x3fff;
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break;
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default:
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2018-06-26 18:50:40 +02:00
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: write into read-only register 0x%x\n",
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__func__, reg);
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2008-05-07 16:41:37 +02:00
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}
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}
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/* This handles most of the chip's logic. */
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2009-05-10 02:44:56 +02:00
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static void tsc2005_pin_update(TSC2005State *s)
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2008-05-07 16:41:37 +02:00
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{
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int64_t expires;
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2016-10-04 14:28:08 +02:00
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bool pin_state;
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2008-05-07 16:41:37 +02:00
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switch (s->pin_func) {
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case 0:
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pin_state = !s->pressure && !!s->dav;
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break;
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case 1:
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case 3:
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default:
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pin_state = !s->dav;
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break;
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case 2:
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pin_state = !s->pressure;
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}
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if (pin_state != s->irq) {
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s->irq = pin_state;
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qemu_set_irq(s->pint, s->irq);
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}
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switch (s->nextfunction) {
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case TSC_MODE_XYZ_SCAN:
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case TSC_MODE_XY_SCAN:
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2008-05-10 00:17:18 +02:00
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if (!s->host_mode && s->dav)
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2016-10-04 14:28:08 +02:00
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s->enabled = false;
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2008-05-07 16:41:37 +02:00
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if (!s->pressure)
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return;
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/* Fall through */
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case TSC_MODE_AUX_SCAN:
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break;
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case TSC_MODE_X:
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case TSC_MODE_Y:
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case TSC_MODE_Z:
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if (!s->pressure)
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return;
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/* Fall through */
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case TSC_MODE_AUX:
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case TSC_MODE_TEMP1:
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case TSC_MODE_TEMP2:
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case TSC_MODE_X_TEST:
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case TSC_MODE_Y_TEST:
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case TSC_MODE_TS_TEST:
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if (s->dav)
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2016-10-04 14:28:08 +02:00
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s->enabled = false;
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2008-05-07 16:41:37 +02:00
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break;
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case TSC_MODE_RESERVED:
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case TSC_MODE_XX_DRV:
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case TSC_MODE_YY_DRV:
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case TSC_MODE_YX_DRV:
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default:
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return;
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}
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if (!s->enabled || s->busy)
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return;
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|
2016-10-04 14:28:08 +02:00
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s->busy = true;
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2008-05-07 16:41:37 +02:00
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s->precision = s->nextprecision;
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s->function = s->nextfunction;
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s->pdst = !s->pnd0; /* Synchronised on internal clock */
|
2016-03-21 17:02:30 +01:00
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expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
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(NANOSECONDS_PER_SECOND >> 7);
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2013-08-21 17:03:08 +02:00
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timer_mod(s->timer, expires);
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2008-05-07 16:41:37 +02:00
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}
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2009-05-10 02:44:56 +02:00
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static void tsc2005_reset(TSC2005State *s)
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2008-05-07 16:41:37 +02:00
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{
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s->state = 0;
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s->pin_func = 0;
|
2016-10-04 14:28:08 +02:00
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s->enabled = false;
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s->busy = false;
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s->nextprecision = false;
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2008-05-07 16:41:37 +02:00
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s->nextfunction = 0;
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s->timing[0] = 0;
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s->timing[1] = 0;
|
2016-10-04 14:28:08 +02:00
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s->irq = false;
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2008-05-07 16:41:37 +02:00
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s->dav = 0;
|
2016-10-04 14:28:08 +02:00
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s->reset = false;
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s->pdst = true;
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s->pnd0 = false;
|
2008-05-07 16:41:37 +02:00
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s->function = -1;
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|
|
s->temp_thr[0] = 0x000;
|
|
|
|
s->temp_thr[1] = 0xfff;
|
|
|
|
s->aux_thr[0] = 0x000;
|
|
|
|
s->aux_thr[1] = 0xfff;
|
|
|
|
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
}
|
|
|
|
|
2008-10-26 14:43:07 +01:00
|
|
|
static uint8_t tsc2005_txrx_word(void *opaque, uint8_t value)
|
2008-05-07 16:41:37 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s = opaque;
|
2008-05-07 16:41:37 +02:00
|
|
|
uint32_t ret = 0;
|
|
|
|
|
|
|
|
switch (s->state ++) {
|
|
|
|
case 0:
|
|
|
|
if (value & 0x80) {
|
|
|
|
/* Command */
|
|
|
|
if (value & (1 << 1))
|
|
|
|
tsc2005_reset(s);
|
|
|
|
else {
|
|
|
|
s->nextfunction = (value >> 3) & 0xf;
|
|
|
|
s->nextprecision = (value >> 2) & 1;
|
|
|
|
if (s->enabled != !(value & 1)) {
|
|
|
|
s->enabled = !(value & 1);
|
2018-06-21 19:12:52 +02:00
|
|
|
trace_tsc2005_sense(s->enabled ? "enabled" : "disabled");
|
2008-05-10 00:17:18 +02:00
|
|
|
if (s->busy && !s->enabled)
|
2013-08-21 17:03:08 +02:00
|
|
|
timer_del(s->timer);
|
2016-10-04 14:28:08 +02:00
|
|
|
s->busy = s->busy && s->enabled;
|
2008-05-07 16:41:37 +02:00
|
|
|
}
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
s->state = 0;
|
|
|
|
} else if (value) {
|
|
|
|
/* Data transfer */
|
|
|
|
s->reg = (value >> 3) & 0xf;
|
|
|
|
s->pnd0 = (value >> 1) & 1;
|
|
|
|
s->command = value & 1;
|
|
|
|
|
|
|
|
if (s->command) {
|
|
|
|
/* Read */
|
|
|
|
s->data = tsc2005_read(s, s->reg);
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
} else
|
|
|
|
s->data = 0;
|
|
|
|
} else
|
|
|
|
s->state = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 1:
|
|
|
|
if (s->command)
|
|
|
|
ret = (s->data >> 8) & 0xff;
|
|
|
|
else
|
|
|
|
s->data |= value << 8;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
if (s->command)
|
|
|
|
ret = s->data & 0xff;
|
|
|
|
else {
|
|
|
|
s->data |= value;
|
|
|
|
tsc2005_write(s, s->reg, s->data);
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
s->state = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t tsc2005_txrx(void *opaque, uint32_t value, int len)
|
|
|
|
{
|
|
|
|
uint32_t ret = 0;
|
|
|
|
|
|
|
|
len &= ~7;
|
|
|
|
while (len > 0) {
|
|
|
|
len -= 8;
|
|
|
|
ret |= tsc2005_txrx_word(opaque, (value >> len) & 0xff) << len;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc2005_timer_tick(void *opaque)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s = opaque;
|
2008-05-07 16:41:37 +02:00
|
|
|
|
|
|
|
/* Timer ticked -- a set of conversions has been finished. */
|
|
|
|
|
|
|
|
if (!s->busy)
|
|
|
|
return;
|
|
|
|
|
2016-10-04 14:28:08 +02:00
|
|
|
s->busy = false;
|
2008-05-07 16:41:37 +02:00
|
|
|
s->dav |= mode_regs[s->function];
|
|
|
|
s->function = -1;
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc2005_touchscreen_event(void *opaque,
|
|
|
|
int x, int y, int z, int buttons_state)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s = opaque;
|
2008-05-07 16:41:37 +02:00
|
|
|
int p = s->pressure;
|
|
|
|
|
|
|
|
if (buttons_state) {
|
|
|
|
s->x = x;
|
|
|
|
s->y = y;
|
|
|
|
}
|
|
|
|
s->pressure = !!buttons_state;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note: We would get better responsiveness in the guest by
|
|
|
|
* signaling TS events immediately, but for now we simulate
|
|
|
|
* the first conversion delay for sake of correctness.
|
|
|
|
*/
|
|
|
|
if (p != s->pressure)
|
|
|
|
tsc2005_pin_update(s);
|
|
|
|
}
|
|
|
|
|
2016-10-04 14:28:08 +02:00
|
|
|
static int tsc2005_post_load(void *opaque, int version_id)
|
2008-05-07 16:41:37 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s = (TSC2005State *) opaque;
|
2008-05-07 16:41:37 +02:00
|
|
|
|
2013-08-21 17:02:39 +02:00
|
|
|
s->busy = timer_pending(s->timer);
|
2008-05-07 16:41:37 +02:00
|
|
|
tsc2005_pin_update(s);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-10-04 14:28:08 +02:00
|
|
|
static const VMStateDescription vmstate_tsc2005 = {
|
|
|
|
.name = "tsc2005",
|
|
|
|
.version_id = 2,
|
|
|
|
.minimum_version_id = 2,
|
|
|
|
.post_load = tsc2005_post_load,
|
|
|
|
.fields = (VMStateField []) {
|
|
|
|
VMSTATE_BOOL(pressure, TSC2005State),
|
|
|
|
VMSTATE_BOOL(irq, TSC2005State),
|
|
|
|
VMSTATE_BOOL(command, TSC2005State),
|
|
|
|
VMSTATE_BOOL(enabled, TSC2005State),
|
|
|
|
VMSTATE_BOOL(host_mode, TSC2005State),
|
|
|
|
VMSTATE_BOOL(reset, TSC2005State),
|
|
|
|
VMSTATE_BOOL(pdst, TSC2005State),
|
|
|
|
VMSTATE_BOOL(pnd0, TSC2005State),
|
|
|
|
VMSTATE_BOOL(precision, TSC2005State),
|
|
|
|
VMSTATE_BOOL(nextprecision, TSC2005State),
|
|
|
|
VMSTATE_UINT8(reg, TSC2005State),
|
|
|
|
VMSTATE_UINT8(state, TSC2005State),
|
|
|
|
VMSTATE_UINT16(data, TSC2005State),
|
|
|
|
VMSTATE_UINT16(dav, TSC2005State),
|
|
|
|
VMSTATE_UINT16(filter, TSC2005State),
|
|
|
|
VMSTATE_INT8(nextfunction, TSC2005State),
|
|
|
|
VMSTATE_INT8(function, TSC2005State),
|
|
|
|
VMSTATE_INT32(x, TSC2005State),
|
|
|
|
VMSTATE_INT32(y, TSC2005State),
|
|
|
|
VMSTATE_TIMER_PTR(timer, TSC2005State),
|
|
|
|
VMSTATE_UINT8(pin_func, TSC2005State),
|
|
|
|
VMSTATE_UINT16_ARRAY(timing, TSC2005State, 2),
|
|
|
|
VMSTATE_UINT8(noise, TSC2005State),
|
|
|
|
VMSTATE_UINT16_ARRAY(temp_thr, TSC2005State, 2),
|
|
|
|
VMSTATE_UINT16_ARRAY(aux_thr, TSC2005State, 2),
|
|
|
|
VMSTATE_INT32_ARRAY(tr, TSC2005State, 8),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2008-05-07 16:41:37 +02:00
|
|
|
void *tsc2005_init(qemu_irq pintdav)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s;
|
2008-05-07 16:41:37 +02:00
|
|
|
|
2022-03-15 15:41:56 +01:00
|
|
|
s = g_new0(TSC2005State, 1);
|
2008-05-07 16:41:37 +02:00
|
|
|
s->x = 400;
|
|
|
|
s->y = 240;
|
2016-10-04 14:28:08 +02:00
|
|
|
s->pressure = false;
|
|
|
|
s->precision = s->nextprecision = false;
|
2013-08-21 17:03:08 +02:00
|
|
|
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc2005_timer_tick, s);
|
2008-05-07 16:41:37 +02:00
|
|
|
s->pint = pintdav;
|
|
|
|
s->model = 0x2005;
|
|
|
|
|
|
|
|
s->tr[0] = 0;
|
|
|
|
s->tr[1] = 1;
|
|
|
|
s->tr[2] = 1;
|
|
|
|
s->tr[3] = 0;
|
|
|
|
s->tr[4] = 1;
|
|
|
|
s->tr[5] = 0;
|
|
|
|
s->tr[6] = 1;
|
|
|
|
s->tr[7] = 0;
|
|
|
|
|
|
|
|
tsc2005_reset(s);
|
|
|
|
|
|
|
|
qemu_add_mouse_event_handler(tsc2005_touchscreen_event, s, 1,
|
|
|
|
"QEMU TSC2005-driven Touchscreen");
|
|
|
|
|
2009-06-27 09:25:07 +02:00
|
|
|
qemu_register_reset((void *) tsc2005_reset, s);
|
2016-10-04 14:28:08 +02:00
|
|
|
vmstate_register(NULL, 0, &vmstate_tsc2005, s);
|
2008-05-07 16:41:37 +02:00
|
|
|
|
|
|
|
return s;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Use tslib generated calibration data to generate ADC input values
|
|
|
|
* from the touchscreen. Assuming 12-bit precision was used during
|
|
|
|
* tslib calibration.
|
|
|
|
*/
|
2022-12-20 15:25:18 +01:00
|
|
|
void tsc2005_set_transform(void *opaque, const MouseTransformInfo *info)
|
2008-05-07 16:41:37 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
TSC2005State *s = (TSC2005State *) opaque;
|
2008-05-07 16:41:37 +02:00
|
|
|
|
|
|
|
/* This version assumes touchscreen X & Y axis are parallel or
|
|
|
|
* perpendicular to LCD's X & Y axis in some way. */
|
|
|
|
if (abs(info->a[0]) > abs(info->a[1])) {
|
|
|
|
s->tr[0] = 0;
|
|
|
|
s->tr[1] = -info->a[6] * info->x;
|
|
|
|
s->tr[2] = info->a[0];
|
|
|
|
s->tr[3] = -info->a[2] / info->a[0];
|
|
|
|
s->tr[4] = info->a[6] * info->y;
|
|
|
|
s->tr[5] = 0;
|
|
|
|
s->tr[6] = info->a[4];
|
|
|
|
s->tr[7] = -info->a[5] / info->a[4];
|
|
|
|
} else {
|
|
|
|
s->tr[0] = info->a[6] * info->y;
|
|
|
|
s->tr[1] = 0;
|
|
|
|
s->tr[2] = info->a[1];
|
|
|
|
s->tr[3] = -info->a[2] / info->a[1];
|
|
|
|
s->tr[4] = 0;
|
|
|
|
s->tr[5] = -info->a[6] * info->x;
|
|
|
|
s->tr[6] = info->a[3];
|
|
|
|
s->tr[7] = -info->a[5] / info->a[3];
|
|
|
|
}
|
|
|
|
|
|
|
|
s->tr[0] >>= 11;
|
|
|
|
s->tr[1] >>= 11;
|
|
|
|
s->tr[3] <<= 4;
|
|
|
|
s->tr[4] >>= 11;
|
|
|
|
s->tr[5] >>= 11;
|
|
|
|
s->tr[7] <<= 4;
|
|
|
|
}
|