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qemu-e2k/hw/pci-host/Makefile.objs

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hw: move target-independent files to subdirectories This patch tackles all files that are compiled once, moving them to subdirectories of hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01 13:59:19 +01:00
common-obj-y += pam.o
# PPC devices
common-obj-$(CONFIG_PREP_PCI) += prep.o
common-obj-$(CONFIG_GRACKLE_PCI) += grackle.o
# NewWorld PowerMac
common-obj-$(CONFIG_UNIN_PCI) += uninorth.o
# PowerPC E500 boards
common-obj-$(CONFIG_PPCE500_PCI) += ppce500.o
# ARM devices
common-obj-$(CONFIG_VERSATILE_PCI) += versatile.o
hw: move PCI bridges to hw/pci-* or hw/ARCH Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:06:20 +01:00
apb: rename apb.c to sabre.c This is the final stage in correcting the naming convention with respect to sabre, APB and PBM. It is effectively a file rename from apb.c to sabre.c along with touching up a few constants to remove the remaining references to APB. Note that as part of the rename process the configuration variable CONFIG_PCI_APB is changed to CONFIG_PCI_SABRE. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
2018-01-21 09:59:45 +01:00
common-obj-$(CONFIG_PCI_SABRE) += sabre.o
hw: move PCI bridges to hw/pci-* or hw/ARCH Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-05 15:06:20 +01:00
common-obj-$(CONFIG_FULONG) += bonito.o
common-obj-$(CONFIG_PCI_PIIX) += piix.o
common-obj-$(CONFIG_PCI_Q35) += q35.o
pci: Add generic PCIe host bridge With simple exposure of MMFG, ioport window, mmio window and an IRQ line we can successfully create a workable PCIe host bridge that can be mapped anywhere and only needs to get described to the OS using whatever means it likes. This patch implements such a "generic" host bridge. It handles 4 legacy IRQ lines. MSIs need to be handled external to the host bridge. This device is particularly useful for the "pci-host-ecam-generic" driver in Linux. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Tested-by: Claudio Fontana <claudio.fontana@huawei.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-02-13 06:46:07 +01:00
common-obj-$(CONFIG_PCI_GENERIC) += gpex.o
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller Add support for emulating the Xilinx AXI Root Port Bridge for PCI Express as described by Xilinx' PG055 document. This is a PCIe controller that can be used with certain series of Xilinx FPGAs, and is used on the MIPS Boston board which will make use of this code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [yongbok.kim@imgtec.com: removed returning on !level, updated IRQ connection with GPIO logic, moved xilinx_pcie_init() to boston.c replaced stw_le_p() with pci_set_word() and other cosmetic changes] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
2016-09-08 16:51:57 +02:00
common-obj-$(CONFIG_PCI_XILINX) += xilinx-pcie.o
pci: Add support for Designware IP block Add code needed to get a functional PCI subsytem when using in conjunction with upstream Linux guest (4.13+). Tested to work against "e1000e" (network adapter, using MSI interrupts) as well as "usb-ehci" (USB controller, using legacy PCI interrupts). Based on "i.MX6 Applications Processor Reference Manual" (Document Number: IMX6DQRM Rev. 4) as well as corresponding dirver in Linux kernel (circa 4.13 - 4.16 found in drivers/pci/dwc/*) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-09 18:09:43 +01:00
common-obj-$(CONFIG_PCI_DESIGNWARE) += designware.o