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Sparc: avoid AREG0 for CWP and PSTATE helpers 

Make CWP and PSTATE helpers take a parameter for CPUState instead
of relying on global env. Remove wrapper functions.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2011-07-03 21:01:59 +00:00
parent e86d9b12b5
commit 063c367558
4 changed files with 90 additions and 201 deletions
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2
Makefile.target
View File

@ -97,7 +97,7 @@ tcg/tcg.o: cpu.h
# HELPER_CFLAGS is used for all the code compiled with static register # HELPER_CFLAGS is used for all the code compiled with static register
# variables # variables
op_helper.o win_helper.o user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS) op_helper.o user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
# Note: this is a workaround. The real fix is to avoid compiling # Note: this is a workaround. The real fix is to avoid compiling
# cpu_signal_handler() in user-exec.c. # cpu_signal_handler() in user-exec.c.

32
target-sparc/helper.h
View File

@ -1,21 +1,21 @@
#include "def-helper.h" #include "def-helper.h"
#ifndef TARGET_SPARC64 #ifndef TARGET_SPARC64
DEF_HELPER_0(rett, void) DEF_HELPER_1(rett, void, env)
DEF_HELPER_1(wrpsr, void, tl) DEF_HELPER_2(wrpsr, void, env, tl)
DEF_HELPER_0(rdpsr, tl) DEF_HELPER_1(rdpsr, tl, env)
#else #else
DEF_HELPER_1(wrpil, void, tl) DEF_HELPER_2(wrpil, void, env, tl)
DEF_HELPER_1(wrpstate, void, tl) DEF_HELPER_2(wrpstate, void, env, tl)
DEF_HELPER_0(done, void) DEF_HELPER_1(done, void, env)
DEF_HELPER_0(retry, void) DEF_HELPER_1(retry, void, env)
DEF_HELPER_0(flushw, void) DEF_HELPER_1(flushw, void, env)
DEF_HELPER_0(saved, void) DEF_HELPER_1(saved, void, env)
DEF_HELPER_0(restored, void) DEF_HELPER_1(restored, void, env)
DEF_HELPER_0(rdccr, tl) DEF_HELPER_1(rdccr, tl, env)
DEF_HELPER_1(wrccr, void, tl) DEF_HELPER_2(wrccr, void, env, tl)
DEF_HELPER_0(rdcwp, tl) DEF_HELPER_1(rdcwp, tl, env)
DEF_HELPER_1(wrcwp, void, tl) DEF_HELPER_2(wrcwp, void, env, tl)
DEF_HELPER_3(array8, tl, env, tl, tl) DEF_HELPER_3(array8, tl, env, tl, tl)
DEF_HELPER_3(alignaddr, tl, env, tl, tl) DEF_HELPER_3(alignaddr, tl, env, tl, tl)
DEF_HELPER_1(popc, tl, tl) DEF_HELPER_1(popc, tl, tl)
@ -33,8 +33,8 @@ DEF_HELPER_2(tick_set_limit, void, ptr, i64)
#endif #endif
DEF_HELPER_2(check_align, void, tl, i32) DEF_HELPER_2(check_align, void, tl, i32)
DEF_HELPER_1(debug, void, env) DEF_HELPER_1(debug, void, env)
DEF_HELPER_0(save, void) DEF_HELPER_1(save, void, env)
DEF_HELPER_0(restore, void) DEF_HELPER_1(restore, void, env)
DEF_HELPER_2(udiv, tl, tl, tl) DEF_HELPER_2(udiv, tl, tl, tl)
DEF_HELPER_2(udiv_cc, tl, tl, tl) DEF_HELPER_2(udiv_cc, tl, tl, tl)
DEF_HELPER_2(sdiv, tl, tl, tl) DEF_HELPER_2(sdiv, tl, tl, tl)

34
target-sparc/translate.c
View File

@ -2107,7 +2107,7 @@ static void disas_sparc_insn(DisasContext * dc)
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
case 0x2: /* V9 rdccr */ case 0x2: /* V9 rdccr */
gen_helper_compute_psr(cpu_env); gen_helper_compute_psr(cpu_env);
gen_helper_rdccr(cpu_dst); gen_helper_rdccr(cpu_dst, cpu_env);
gen_movl_TN_reg(rd, cpu_dst); gen_movl_TN_reg(rd, cpu_dst);
break; break;
case 0x3: /* V9 rdasi */ case 0x3: /* V9 rdasi */
@ -2184,7 +2184,7 @@ static void disas_sparc_insn(DisasContext * dc)
goto priv_insn; goto priv_insn;
gen_helper_compute_psr(cpu_env); gen_helper_compute_psr(cpu_env);
dc->cc_op = CC_OP_FLAGS; dc->cc_op = CC_OP_FLAGS;
gen_helper_rdpsr(cpu_dst); gen_helper_rdpsr(cpu_dst, cpu_env);
#else #else
CHECK_IU_FEATURE(dc, HYPV); CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc)) if (!hypervisor(dc))
@ -2297,7 +2297,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
break; break;
case 9: // cwp case 9: // cwp
gen_helper_rdcwp(cpu_tmp0); gen_helper_rdcwp(cpu_tmp0, cpu_env);
break; break;
case 10: // cansave case 10: // cansave
tcg_gen_ld_i32(cpu_tmp32, cpu_env, tcg_gen_ld_i32(cpu_tmp32, cpu_env,
@ -2351,7 +2351,7 @@ static void disas_sparc_insn(DisasContext * dc)
} else if (xop == 0x2b) { /* rdtbr / V9 flushw */ } else if (xop == 0x2b) { /* rdtbr / V9 flushw */
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
save_state(dc, cpu_cond); save_state(dc, cpu_cond);
gen_helper_flushw(); gen_helper_flushw(cpu_env);
#else #else
if (!supervisor(dc)) if (!supervisor(dc))
goto priv_insn; goto priv_insn;
@ -3379,7 +3379,7 @@ static void disas_sparc_insn(DisasContext * dc)
#else #else
case 0x2: /* V9 wrccr */ case 0x2: /* V9 wrccr */
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
gen_helper_wrccr(cpu_dst); gen_helper_wrccr(cpu_env, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS; dc->cc_op = CC_OP_FLAGS;
break; break;
@ -3499,10 +3499,10 @@ static void disas_sparc_insn(DisasContext * dc)
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
switch (rd) { switch (rd) {
case 0: case 0:
gen_helper_saved(); gen_helper_saved(cpu_env);
break; break;
case 1: case 1:
gen_helper_restored(); gen_helper_restored(cpu_env);
break; break;
case 2: /* UA2005 allclean */ case 2: /* UA2005 allclean */
case 3: /* UA2005 otherw */ case 3: /* UA2005 otherw */
@ -3514,7 +3514,7 @@ static void disas_sparc_insn(DisasContext * dc)
} }
#else #else
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
gen_helper_wrpsr(cpu_dst); gen_helper_wrpsr(cpu_env, cpu_dst);
tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
dc->cc_op = CC_OP_FLAGS; dc->cc_op = CC_OP_FLAGS;
save_state(dc, cpu_cond); save_state(dc, cpu_cond);
@ -3598,7 +3598,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_mov_tl(r_tmp, cpu_tmp0); tcg_gen_mov_tl(r_tmp, cpu_tmp0);
save_state(dc, cpu_cond); save_state(dc, cpu_cond);
gen_helper_wrpstate(r_tmp); gen_helper_wrpstate(cpu_env, r_tmp);
tcg_temp_free(r_tmp); tcg_temp_free(r_tmp);
dc->npc = DYNAMIC_PC; dc->npc = DYNAMIC_PC;
} }
@ -3617,10 +3617,10 @@ static void disas_sparc_insn(DisasContext * dc)
} }
break; break;
case 8: // pil case 8: // pil
gen_helper_wrpil(cpu_tmp0); gen_helper_wrpil(cpu_env, cpu_tmp0);
break; break;
case 9: // cwp case 9: // cwp
gen_helper_wrcwp(cpu_tmp0); gen_helper_wrcwp(cpu_env, cpu_tmp0);
break; break;
case 10: // cansave case 10: // cansave
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
@ -4307,7 +4307,7 @@ static void disas_sparc_insn(DisasContext * dc)
} else } else
tcg_gen_mov_tl(cpu_dst, cpu_src1); tcg_gen_mov_tl(cpu_dst, cpu_src1);
} }
gen_helper_restore(); gen_helper_restore(cpu_env);
gen_mov_pc_npc(dc, cpu_cond); gen_mov_pc_npc(dc, cpu_cond);
r_const = tcg_const_i32(3); r_const = tcg_const_i32(3);
gen_helper_check_align(cpu_dst, r_const); gen_helper_check_align(cpu_dst, r_const);
@ -4359,7 +4359,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_temp_free_i32(r_const); tcg_temp_free_i32(r_const);
tcg_gen_mov_tl(cpu_npc, cpu_dst); tcg_gen_mov_tl(cpu_npc, cpu_dst);
dc->npc = DYNAMIC_PC; dc->npc = DYNAMIC_PC;
gen_helper_rett(); gen_helper_rett(cpu_env);
} }
goto jmp_insn; goto jmp_insn;
#endif #endif
@ -4370,12 +4370,12 @@ static void disas_sparc_insn(DisasContext * dc)
break; break;
case 0x3c: /* save */ case 0x3c: /* save */
save_state(dc, cpu_cond); save_state(dc, cpu_cond);
gen_helper_save(); gen_helper_save(cpu_env);
gen_movl_TN_reg(rd, cpu_dst); gen_movl_TN_reg(rd, cpu_dst);
break; break;
case 0x3d: /* restore */ case 0x3d: /* restore */
save_state(dc, cpu_cond); save_state(dc, cpu_cond);
gen_helper_restore(); gen_helper_restore(cpu_env);
gen_movl_TN_reg(rd, cpu_dst); gen_movl_TN_reg(rd, cpu_dst);
break; break;
#if !defined(CONFIG_USER_ONLY) && defined(TARGET_SPARC64) #if !defined(CONFIG_USER_ONLY) && defined(TARGET_SPARC64)
@ -4387,14 +4387,14 @@ static void disas_sparc_insn(DisasContext * dc)
goto priv_insn; goto priv_insn;
dc->npc = DYNAMIC_PC; dc->npc = DYNAMIC_PC;
dc->pc = DYNAMIC_PC; dc->pc = DYNAMIC_PC;
gen_helper_done(); gen_helper_done(cpu_env);
goto jmp_insn; goto jmp_insn;
case 1: case 1:
if (!supervisor(dc)) if (!supervisor(dc))
goto priv_insn; goto priv_insn;
dc->npc = DYNAMIC_PC; dc->npc = DYNAMIC_PC;
dc->pc = DYNAMIC_PC; dc->pc = DYNAMIC_PC;
gen_helper_retry(); gen_helper_retry(cpu_env);
goto jmp_insn; goto jmp_insn;
default: default:
goto illegal_insn; goto illegal_insn;

223
target-sparc/win_helper.c
View File

@ -18,7 +18,6 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
//#define DEBUG_PSTATE //#define DEBUG_PSTATE
@ -42,7 +41,7 @@ static inline void memcpy32(target_ulong *dst, const target_ulong *src)
dst[7] = src[7]; dst[7] = src[7];
} }
static void set_cwp(int new_cwp) void cpu_set_cwp(CPUState *env, int new_cwp)
{ {
/* put the modified wrap registers at their proper location */ /* put the modified wrap registers at their proper location */
if (env->cwp == env->nwindows - 1) { if (env->cwp == env->nwindows - 1) {
@ -57,17 +56,7 @@ static void set_cwp(int new_cwp)
env->regwptr = env->regbase + (new_cwp * 16); env->regwptr = env->regbase + (new_cwp * 16);
} }
void cpu_set_cwp(CPUState *env1, int new_cwp) target_ulong cpu_get_psr(CPUState *env)
{
CPUState *saved_env;
saved_env = env;
env = env1;
set_cwp(new_cwp);
env = saved_env;
}
static target_ulong get_psr(void)
{ {
helper_compute_psr(env); helper_compute_psr(env);
@ -83,19 +72,7 @@ static target_ulong get_psr(void)
#endif #endif
} }
target_ulong cpu_get_psr(CPUState *env1) void cpu_put_psr(CPUState *env, target_ulong val)
{
CPUState *saved_env;
target_ulong ret;
saved_env = env;
env = env1;
ret = get_psr();
env = saved_env;
return ret;
}
static void put_psr(target_ulong val)
{ {
env->psr = val & PSR_ICC; env->psr = val & PSR_ICC;
#if !defined(TARGET_SPARC64) #if !defined(TARGET_SPARC64)
@ -109,22 +86,12 @@ static void put_psr(target_ulong val)
env->psrs = (val & PSR_S) ? 1 : 0; env->psrs = (val & PSR_S) ? 1 : 0;
env->psrps = (val & PSR_PS) ? 1 : 0; env->psrps = (val & PSR_PS) ? 1 : 0;
env->psret = (val & PSR_ET) ? 1 : 0; env->psret = (val & PSR_ET) ? 1 : 0;
set_cwp(val & PSR_CWP); cpu_set_cwp(env, val & PSR_CWP);
#endif #endif
env->cc_op = CC_OP_FLAGS; env->cc_op = CC_OP_FLAGS;
} }
void cpu_put_psr(CPUState *env1, target_ulong val) int cpu_cwp_inc(CPUState *env, int cwp)
{
CPUState *saved_env;
saved_env = env;
env = env1;
put_psr(val);
env = saved_env;
}
static int cwp_inc(int cwp)
{ {
if (unlikely(cwp >= env->nwindows)) { if (unlikely(cwp >= env->nwindows)) {
cwp -= env->nwindows; cwp -= env->nwindows;
@ -132,19 +99,7 @@ static int cwp_inc(int cwp)
return cwp; return cwp;
} }
int cpu_cwp_inc(CPUState *env1, int cwp) int cpu_cwp_dec(CPUState *env, int cwp)
{
CPUState *saved_env;
target_ulong ret;
saved_env = env;
env = env1;
ret = cwp_inc(cwp);
env = saved_env;
return ret;
}
static int cwp_dec(int cwp)
{ {
if (unlikely(cwp < 0)) { if (unlikely(cwp < 0)) {
cwp += env->nwindows; cwp += env->nwindows;
@ -152,20 +107,8 @@ static int cwp_dec(int cwp)
return cwp; return cwp;
} }
int cpu_cwp_dec(CPUState *env1, int cwp)
{
CPUState *saved_env;
target_ulong ret;
saved_env = env;
env = env1;
ret = cwp_dec(cwp);
env = saved_env;
return ret;
}
#ifndef TARGET_SPARC64 #ifndef TARGET_SPARC64
void helper_rett(void) void helper_rett(CPUState *env)
{ {
unsigned int cwp; unsigned int cwp;
@ -174,39 +117,39 @@ void helper_rett(void)
} }
env->psret = 1; env->psret = 1;
cwp = cwp_inc(env->cwp + 1) ; cwp = cpu_cwp_inc(env, env->cwp + 1) ;
if (env->wim & (1 << cwp)) { if (env->wim & (1 << cwp)) {
helper_raise_exception(env, TT_WIN_UNF); helper_raise_exception(env, TT_WIN_UNF);
} }
set_cwp(cwp); cpu_set_cwp(env, cwp);
env->psrs = env->psrps; env->psrs = env->psrps;
} }
/* XXX: use another pointer for %iN registers to avoid slow wrapping /* XXX: use another pointer for %iN registers to avoid slow wrapping
handling ? */ handling ? */
void helper_save(void) void helper_save(CPUState *env)
{ {
uint32_t cwp; uint32_t cwp;
cwp = cwp_dec(env->cwp - 1); cwp = cpu_cwp_dec(env, env->cwp - 1);
if (env->wim & (1 << cwp)) { if (env->wim & (1 << cwp)) {
helper_raise_exception(env, TT_WIN_OVF); helper_raise_exception(env, TT_WIN_OVF);
} }
set_cwp(cwp); cpu_set_cwp(env, cwp);
} }
void helper_restore(void) void helper_restore(CPUState *env)
{ {
uint32_t cwp; uint32_t cwp;
cwp = cwp_inc(env->cwp + 1); cwp = cpu_cwp_inc(env, env->cwp + 1);
if (env->wim & (1 << cwp)) { if (env->wim & (1 << cwp)) {
helper_raise_exception(env, TT_WIN_UNF); helper_raise_exception(env, TT_WIN_UNF);
} }
set_cwp(cwp); cpu_set_cwp(env, cwp);
} }
void helper_wrpsr(target_ulong new_psr) void helper_wrpsr(CPUState *env, target_ulong new_psr)
{ {
if ((new_psr & PSR_CWP) >= env->nwindows) { if ((new_psr & PSR_CWP) >= env->nwindows) {
helper_raise_exception(env, TT_ILL_INSN); helper_raise_exception(env, TT_ILL_INSN);
@ -215,19 +158,19 @@ void helper_wrpsr(target_ulong new_psr)
} }
} }
target_ulong helper_rdpsr(void) target_ulong helper_rdpsr(CPUState *env)
{ {
return get_psr(); return cpu_get_psr(env);
} }
#else #else
/* XXX: use another pointer for %iN registers to avoid slow wrapping /* XXX: use another pointer for %iN registers to avoid slow wrapping
handling ? */ handling ? */
void helper_save(void) void helper_save(CPUState *env)
{ {
uint32_t cwp; uint32_t cwp;
cwp = cwp_dec(env->cwp - 1); cwp = cpu_cwp_dec(env, env->cwp - 1);
if (env->cansave == 0) { if (env->cansave == 0) {
helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ?
(TT_WOTHER | (TT_WOTHER |
@ -240,16 +183,16 @@ void helper_save(void)
} else { } else {
env->cansave--; env->cansave--;
env->canrestore++; env->canrestore++;
set_cwp(cwp); cpu_set_cwp(env, cwp);
} }
} }
} }
void helper_restore(void) void helper_restore(CPUState *env)
{ {
uint32_t cwp; uint32_t cwp;
cwp = cwp_inc(env->cwp + 1); cwp = cpu_cwp_inc(env, env->cwp + 1);
if (env->canrestore == 0) { if (env->canrestore == 0) {
helper_raise_exception(env, TT_FILL | (env->otherwin != 0 ? helper_raise_exception(env, TT_FILL | (env->otherwin != 0 ?
(TT_WOTHER | (TT_WOTHER |
@ -258,11 +201,11 @@ void helper_restore(void)
} else { } else {
env->cansave++; env->cansave++;
env->canrestore--; env->canrestore--;
set_cwp(cwp); cpu_set_cwp(env, cwp);
} }
} }
void helper_flushw(void) void helper_flushw(CPUState *env)
{ {
if (env->cansave != env->nwindows - 2) { if (env->cansave != env->nwindows - 2) {
helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ?
@ -272,7 +215,7 @@ void helper_flushw(void)
} }
} }
void helper_saved(void) void helper_saved(CPUState *env)
{ {
env->cansave++; env->cansave++;
if (env->otherwin == 0) { if (env->otherwin == 0) {
@ -282,7 +225,7 @@ void helper_saved(void)
} }
} }
void helper_restored(void) void helper_restored(CPUState *env)
{ {
env->canrestore++; env->canrestore++;
if (env->cleanwin < env->nwindows - 1) { if (env->cleanwin < env->nwindows - 1) {
@ -295,102 +238,58 @@ void helper_restored(void)
} }
} }
static target_ulong get_ccr(void) target_ulong cpu_get_ccr(CPUState *env)
{ {
target_ulong psr; target_ulong psr;
psr = get_psr(); psr = cpu_get_psr(env);
return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20); return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20);
} }
target_ulong cpu_get_ccr(CPUState *env1) void cpu_put_ccr(CPUState *env, target_ulong val)
{
CPUState *saved_env;
target_ulong ret;
saved_env = env;
env = env1;
ret = get_ccr();
env = saved_env;
return ret;
}
static void put_ccr(target_ulong val)
{ {
env->xcc = (val >> 4) << 20; env->xcc = (val >> 4) << 20;
env->psr = (val & 0xf) << 20; env->psr = (val & 0xf) << 20;
CC_OP = CC_OP_FLAGS; CC_OP = CC_OP_FLAGS;
} }
void cpu_put_ccr(CPUState *env1, target_ulong val) target_ulong cpu_get_cwp64(CPUState *env)
{
CPUState *saved_env;
saved_env = env;
env = env1;
put_ccr(val);
env = saved_env;
}
static target_ulong get_cwp64(void)
{ {
return env->nwindows - 1 - env->cwp; return env->nwindows - 1 - env->cwp;
} }
target_ulong cpu_get_cwp64(CPUState *env1) void cpu_put_cwp64(CPUState *env, int cwp)
{
CPUState *saved_env;
target_ulong ret;
saved_env = env;
env = env1;
ret = get_cwp64();
env = saved_env;
return ret;
}
static void put_cwp64(int cwp)
{ {
if (unlikely(cwp >= env->nwindows || cwp < 0)) { if (unlikely(cwp >= env->nwindows || cwp < 0)) {
cwp %= env->nwindows; cwp %= env->nwindows;
} }
set_cwp(env->nwindows - 1 - cwp); cpu_set_cwp(env, env->nwindows - 1 - cwp);
} }
void cpu_put_cwp64(CPUState *env1, int cwp) target_ulong helper_rdccr(CPUState *env)
{ {
CPUState *saved_env; return cpu_get_ccr(env);
saved_env = env;
env = env1;
put_cwp64(cwp);
env = saved_env;
} }
target_ulong helper_rdccr(void) void helper_wrccr(CPUState *env, target_ulong new_ccr)
{ {
return get_ccr(); cpu_put_ccr(env, new_ccr);
}
void helper_wrccr(target_ulong new_ccr)
{
put_ccr(new_ccr);
} }
/* CWP handling is reversed in V9, but we still use the V8 register /* CWP handling is reversed in V9, but we still use the V8 register
order. */ order. */
target_ulong helper_rdcwp(void) target_ulong helper_rdcwp(CPUState *env)
{ {
return get_cwp64(); return cpu_get_cwp64(env);
} }
void helper_wrcwp(target_ulong new_cwp) void helper_wrcwp(CPUState *env, target_ulong new_cwp)
{ {
put_cwp64(new_cwp); cpu_put_cwp64(env, new_cwp);
} }
static inline uint64_t *get_gregset(uint32_t pstate) static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate)
{ {
switch (pstate) { switch (pstate) {
default: default:
@ -411,7 +310,7 @@ static inline uint64_t *get_gregset(uint32_t pstate)
} }
} }
static inline void change_pstate(uint32_t new_pstate) void cpu_change_pstate(CPUState *env, uint32_t new_pstate)
{ {
uint32_t pstate_regs, new_pstate_regs; uint32_t pstate_regs, new_pstate_regs;
uint64_t *src, *dst; uint64_t *src, *dst;
@ -428,8 +327,8 @@ static inline void change_pstate(uint32_t new_pstate)
DPRINTF_PSTATE("change_pstate: switching regs old=%x new=%x\n", DPRINTF_PSTATE("change_pstate: switching regs old=%x new=%x\n",
pstate_regs, new_pstate_regs); pstate_regs, new_pstate_regs);
/* Switch global register bank */ /* Switch global register bank */
src = get_gregset(new_pstate_regs); src = get_gregset(env, new_pstate_regs);
dst = get_gregset(pstate_regs); dst = get_gregset(env, pstate_regs);
memcpy32(dst, env->gregs); memcpy32(dst, env->gregs);
memcpy32(env->gregs, src); memcpy32(env->gregs, src);
} else { } else {
@ -439,9 +338,9 @@ static inline void change_pstate(uint32_t new_pstate)
env->pstate = new_pstate; env->pstate = new_pstate;
} }
void helper_wrpstate(target_ulong new_state) void helper_wrpstate(CPUState *env, target_ulong new_state)
{ {
change_pstate(new_state & 0xf3f); cpu_change_pstate(env, new_state & 0xf3f);
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
if (cpu_interrupts_enabled(env)) { if (cpu_interrupts_enabled(env)) {
@ -450,17 +349,7 @@ void helper_wrpstate(target_ulong new_state)
#endif #endif
} }
void cpu_change_pstate(CPUState *env1, uint32_t new_pstate) void helper_wrpil(CPUState *env, target_ulong new_pil)
{
CPUState *saved_env;
saved_env = env;
env = env1;
change_pstate(new_pstate);
env = saved_env;
}
void helper_wrpil(target_ulong new_pil)
{ {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
DPRINTF_PSTATE("helper_wrpil old=%x new=%x\n", DPRINTF_PSTATE("helper_wrpil old=%x new=%x\n",
@ -474,16 +363,16 @@ void helper_wrpil(target_ulong new_pil)
#endif #endif
} }
void helper_done(void) void helper_done(CPUState *env)
{ {
trap_state *tsptr = cpu_tsptr(env); trap_state *tsptr = cpu_tsptr(env);
env->pc = tsptr->tnpc; env->pc = tsptr->tnpc;
env->npc = tsptr->tnpc + 4; env->npc = tsptr->tnpc + 4;
put_ccr(tsptr->tstate >> 32); cpu_put_ccr(env, tsptr->tstate >> 32);
env->asi = (tsptr->tstate >> 24) & 0xff; env->asi = (tsptr->tstate >> 24) & 0xff;
change_pstate((tsptr->tstate >> 8) & 0xf3f); cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f);
put_cwp64(tsptr->tstate & 0xff); cpu_put_cwp64(env, tsptr->tstate & 0xff);
env->tl--; env->tl--;
DPRINTF_PSTATE("... helper_done tl=%d\n", env->tl); DPRINTF_PSTATE("... helper_done tl=%d\n", env->tl);
@ -495,16 +384,16 @@ void helper_done(void)
#endif #endif
} }
void helper_retry(void) void helper_retry(CPUState *env)
{ {
trap_state *tsptr = cpu_tsptr(env); trap_state *tsptr = cpu_tsptr(env);
env->pc = tsptr->tpc; env->pc = tsptr->tpc;
env->npc = tsptr->tnpc; env->npc = tsptr->tnpc;
put_ccr(tsptr->tstate >> 32); cpu_put_ccr(env, tsptr->tstate >> 32);
env->asi = (tsptr->tstate >> 24) & 0xff; env->asi = (tsptr->tstate >> 24) & 0xff;
change_pstate((tsptr->tstate >> 8) & 0xf3f); cpu_change_pstate(env, (tsptr->tstate >> 8) & 0xf3f);
put_cwp64(tsptr->tstate & 0xff); cpu_put_cwp64(env, tsptr->tstate & 0xff);
env->tl--; env->tl--;
DPRINTF_PSTATE("... helper_retry tl=%d\n", env->tl); DPRINTF_PSTATE("... helper_retry tl=%d\n", env->tl);