cpu defs: add pse36, mca, mtrr to AMD CPU definitions (v2)
This patch adds some missing flags to extfeature_edx, that were missing according to AMD's latest CPUID document. This is based on a previous patch from John Cooper where this was introduced with many other changes at the same time. Original John's patch submission is at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>. Original John's patch description was: cpu model bug fixes and definition corrections This patch was intended to address the replicated feature flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx. This is due to AMD's definition where these flags are mostly cloned in the 8000_0001:edx cpuid function. qemu64 attempted to glue together the respective Intel and AMD nearly disjoint features and this propagated to the new Intel models as doing so was believed conservative at the time. However after further soak and test lugging around this cruft doesn't provide any value, could conceivably confuse a guest, and has confused users trying to maintain/add cpu definitions. This also caused issues for libvirt attempting to track this mis-encoding. So we've here tossed out the AMD replicated definitions from the Intel models, added a few replications into AMD definitions which were missing according to AMD's latest CPUID document, and reordered the config file flags to follow intuitive sequential bit ordering. Also two flag name aliases were added for clarity to Intel models. The end result being the models definitions now conform to their respective cpuid specifications sans x2apic which is emulated by kvm. This was tested with the following combinations: [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host Yielding successful boots in all cases. Signed-off-by: john cooper <john.cooper@redhat.com> Changes v1 -> v2: - Rebase against latest Qemu git tree Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -51,7 +51,7 @@
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
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feature_ecx = "sse3"
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extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
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extfeature_edx = "lm fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
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# extfeature_ecx = ""
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xlevel = "0x80000008"
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model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
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@ -65,7 +65,7 @@
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
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feature_ecx = "cx16 sse3"
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extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
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extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
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extfeature_ecx = "svm lahf_lm"
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xlevel = "0x80000008"
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model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
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@ -79,7 +79,7 @@
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stepping = "1"
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feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
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feature_ecx = "popcnt cx16 monitor sse3"
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extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
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extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
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extfeature_ecx = "misalignsse sse4a abm svm lahf_lm"
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xlevel = "0x80000008"
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model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
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