target-sparc: Tidy global register initialization
Create tables for the various global registers that need allocation. Remove one level of indirection from gregnames and fregnames. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
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Richard Henderson
parent
91478cefaa
commit
0ea63844c2
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@ -5329,106 +5329,89 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
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void gen_intermediate_code_init(CPUSPARCState *env)
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void gen_intermediate_code_init(CPUSPARCState *env)
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{
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{
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unsigned int i;
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static int inited;
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static int inited;
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static const char * const gregnames[8] = {
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static const char gregnames[8][4] = {
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NULL, // g0 not used
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"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"g1",
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"g2",
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"g3",
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"g4",
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"g5",
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"g6",
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"g7",
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};
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};
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static const char * const fregnames[32] = {
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static const char fregnames[32][4] = {
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"f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
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"f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14",
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"f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30",
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"f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30",
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"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
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"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
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"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
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"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
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};
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};
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/* init various static tables */
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static const struct { TCGv_i32 *ptr; int off; const char *name; } r32[] = {
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if (!inited) {
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inited = 1;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
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offsetof(CPUSPARCState, regwptr),
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"regwptr");
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#ifdef TARGET_SPARC64
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#ifdef TARGET_SPARC64
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cpu_xcc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, xcc),
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{ &cpu_xcc, offsetof(CPUSPARCState, xcc), "xcc" },
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"xcc");
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{ &cpu_asi, offsetof(CPUSPARCState, asi), "asi" },
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cpu_asi = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, asi),
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{ &cpu_fprs, offsetof(CPUSPARCState, fprs), "fprs" },
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"asi");
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{ &cpu_softint, offsetof(CPUSPARCState, softint), "softint" },
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cpu_fprs = tcg_global_mem_new_i32(cpu_env,
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offsetof(CPUSPARCState, fprs),
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"fprs");
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cpu_gsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, gsr),
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"gsr");
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cpu_tick_cmpr = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, tick_cmpr),
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"tick_cmpr");
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cpu_stick_cmpr = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, stick_cmpr),
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"stick_cmpr");
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cpu_hstick_cmpr = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, hstick_cmpr),
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"hstick_cmpr");
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cpu_hintp = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hintp),
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"hintp");
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cpu_htba = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, htba),
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"htba");
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cpu_hver = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hver),
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"hver");
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cpu_ssr = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, ssr), "ssr");
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cpu_ver = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, version), "ver");
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cpu_softint = tcg_global_mem_new_i32(cpu_env,
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offsetof(CPUSPARCState, softint),
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"softint");
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#else
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#else
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cpu_wim = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, wim),
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{ &cpu_wim, offsetof(CPUSPARCState, wim), "wim" },
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"wim");
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#endif
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#endif
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cpu_cond = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, cond),
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{ &cpu_cc_op, offsetof(CPUSPARCState, cc_op), "cc_op" },
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"cond");
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{ &cpu_psr, offsetof(CPUSPARCState, psr), "psr" },
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cpu_cc_src = tcg_global_mem_new(cpu_env,
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};
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offsetof(CPUSPARCState, cc_src),
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"cc_src");
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static const struct { TCGv *ptr; int off; const char *name; } rtl[] = {
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cpu_cc_src2 = tcg_global_mem_new(cpu_env,
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#ifdef TARGET_SPARC64
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offsetof(CPUSPARCState, cc_src2),
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{ &cpu_gsr, offsetof(CPUSPARCState, gsr), "gsr" },
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"cc_src2");
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{ &cpu_tick_cmpr, offsetof(CPUSPARCState, tick_cmpr), "tick_cmpr" },
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cpu_cc_dst = tcg_global_mem_new(cpu_env,
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{ &cpu_stick_cmpr, offsetof(CPUSPARCState, stick_cmpr), "stick_cmpr" },
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offsetof(CPUSPARCState, cc_dst),
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{ &cpu_hstick_cmpr, offsetof(CPUSPARCState, hstick_cmpr),
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"cc_dst");
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"hstick_cmpr" },
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cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
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{ &cpu_hintp, offsetof(CPUSPARCState, hintp), "hintp" },
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offsetof(CPUSPARCState, cc_op),
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{ &cpu_htba, offsetof(CPUSPARCState, htba), "htba" },
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"cc_op");
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{ &cpu_hver, offsetof(CPUSPARCState, hver), "hver" },
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cpu_psr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, psr),
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{ &cpu_ssr, offsetof(CPUSPARCState, ssr), "ssr" },
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"psr");
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{ &cpu_ver, offsetof(CPUSPARCState, version), "ver" },
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cpu_fsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, fsr),
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#endif
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"fsr");
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{ &cpu_cond, offsetof(CPUSPARCState, cond), "cond" },
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cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, pc),
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{ &cpu_cc_src, offsetof(CPUSPARCState, cc_src), "cc_src" },
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"pc");
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{ &cpu_cc_src2, offsetof(CPUSPARCState, cc_src2), "cc_src2" },
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cpu_npc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, npc),
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{ &cpu_cc_dst, offsetof(CPUSPARCState, cc_dst), "cc_dst" },
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"npc");
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{ &cpu_fsr, offsetof(CPUSPARCState, fsr), "fsr" },
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cpu_y = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, y), "y");
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{ &cpu_pc, offsetof(CPUSPARCState, pc), "pc" },
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{ &cpu_npc, offsetof(CPUSPARCState, npc), "npc" },
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{ &cpu_y, offsetof(CPUSPARCState, y), "y" },
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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cpu_tbr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, tbr),
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{ &cpu_tbr, offsetof(CPUSPARCState, tbr), "tbr" },
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"tbr");
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#endif
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#endif
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for (i = 1; i < 8; i++) {
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};
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cpu_gregs[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, gregs[i]),
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unsigned int i;
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gregnames[i]);
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}
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/* init various static tables */
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for (i = 0; i < TARGET_DPREGS; i++) {
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if (inited) {
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cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
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return;
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offsetof(CPUSPARCState, fpr[i]),
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}
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fregnames[i]);
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inited = 1;
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}
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
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offsetof(CPUSPARCState, regwptr),
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"regwptr");
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for (i = 0; i < ARRAY_SIZE(r32); ++i) {
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*r32[i].ptr = tcg_global_mem_new_i32(cpu_env, r32[i].off, r32[i].name);
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}
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for (i = 0; i < ARRAY_SIZE(rtl); ++i) {
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*rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name);
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}
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TCGV_UNUSED(cpu_gregs[0]);
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for (i = 1; i < 8; ++i) {
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cpu_gregs[i] = tcg_global_mem_new(cpu_env,
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offsetof(CPUSPARCState, gregs[i]),
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gregnames[i]);
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}
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for (i = 0; i < TARGET_DPREGS; i++) {
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cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUSPARCState, fpr[i]),
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fregnames[i]);
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}
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}
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}
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}
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