tcg-sparc: Implement ORC.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Richard Henderson 2010-02-16 14:23:39 -08:00 committed by Blue Swirl
parent dc69960dd6
commit 18c8f7a35d
2 changed files with 7 additions and 0 deletions

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@ -1223,6 +1223,9 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
OP_32_64(or): OP_32_64(or):
c = ARITH_OR; c = ARITH_OR;
goto gen_arith; goto gen_arith;
OP_32_64(orc):
c = ARITH_ORN;
goto gen_arith;
OP_32_64(xor): OP_32_64(xor):
c = ARITH_XOR; c = ARITH_XOR;
goto gen_arith; goto gen_arith;
@ -1442,6 +1445,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_and_i32, { "r", "r", "rJ" } }, { INDEX_op_and_i32, { "r", "r", "rJ" } },
{ INDEX_op_andc_i32, { "r", "r", "rJ" } }, { INDEX_op_andc_i32, { "r", "r", "rJ" } },
{ INDEX_op_or_i32, { "r", "r", "rJ" } }, { INDEX_op_or_i32, { "r", "r", "rJ" } },
{ INDEX_op_orc_i32, { "r", "r", "rJ" } },
{ INDEX_op_xor_i32, { "r", "r", "rJ" } }, { INDEX_op_xor_i32, { "r", "r", "rJ" } },
{ INDEX_op_shl_i32, { "r", "r", "rJ" } }, { INDEX_op_shl_i32, { "r", "r", "rJ" } },
@ -1500,6 +1504,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_and_i64, { "r", "r", "rJ" } }, { INDEX_op_and_i64, { "r", "r", "rJ" } },
{ INDEX_op_andc_i64, { "r", "r", "rJ" } }, { INDEX_op_andc_i64, { "r", "r", "rJ" } },
{ INDEX_op_or_i64, { "r", "r", "rJ" } }, { INDEX_op_or_i64, { "r", "r", "rJ" } },
{ INDEX_op_orc_i64, { "r", "r", "rJ" } },
{ INDEX_op_xor_i64, { "r", "r", "rJ" } }, { INDEX_op_xor_i64, { "r", "r", "rJ" } },
{ INDEX_op_shl_i64, { "r", "r", "rJ" } }, { INDEX_op_shl_i64, { "r", "r", "rJ" } },

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@ -94,6 +94,7 @@ enum {
#define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_not_i32 #define TCG_TARGET_HAS_not_i32
#define TCG_TARGET_HAS_andc_i32 #define TCG_TARGET_HAS_andc_i32
#define TCG_TARGET_HAS_orc_i32
#if TCG_TARGET_REG_BITS == 64 #if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_ext32s_i64 #define TCG_TARGET_HAS_ext32s_i64
@ -101,6 +102,7 @@ enum {
#define TCG_TARGET_HAS_neg_i64 #define TCG_TARGET_HAS_neg_i64
#define TCG_TARGET_HAS_not_i64 #define TCG_TARGET_HAS_not_i64
#define TCG_TARGET_HAS_andc_i64 #define TCG_TARGET_HAS_andc_i64
#define TCG_TARGET_HAS_orc_i64
#endif #endif
//#define TCG_TARGET_HAS_bswap32_i32 //#define TCG_TARGET_HAS_bswap32_i32