kvm/powerpc: Add MPC8544DS board support
This patch add an emulation of MPC8544DS board. It can work on All E500 platforms. Signed-off-by: Liu Yu <yu.liu@freescale.com> Acked-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6663 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32
parent
9fdc60bf55
commit
1db09b847e
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@ -603,7 +603,7 @@ OBJS+= unin_pci.o ppc_newworld.o
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OBJS+= pflash_cfi02.o ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o
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OBJS+= ppc440.o ppc440_bamboo.o
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# PowerPC E500 boards
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OBJS+= ppce500_pci.o
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OBJS+= ppce500_pci.o ppce500_mpc8544ds.o
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ifdef FDT_LIBS
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OBJS+= device_tree.o
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LIBS+= $(FDT_LIBS)
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@ -42,6 +42,7 @@ extern QEMUMachine heathrow_machine;
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extern QEMUMachine ref405ep_machine;
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extern QEMUMachine taihu_machine;
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extern QEMUMachine bamboo_machine;
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extern QEMUMachine mpc8544ds_machine;
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/* mips_r4k.c */
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extern QEMUMachine mips_machine;
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@ -0,0 +1,22 @@
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/*
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* QEMU PowerPC E500 emulation shared definitions
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*
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* Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, <yu.liu@freescale.com>
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*
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* This file is derived from hw/ppc440.h
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* the copyright for that material belongs to the original owners.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#if !defined(PPC_E500_H)
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#define PPC_E500_H
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PCIBus *ppce500_pci_init(qemu_irq *pic, target_phys_addr_t registers);
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#endif /* !defined(PPC_E500_H) */
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@ -0,0 +1,284 @@
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/*
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* Qemu PowerPC MPC8544DS board emualtion
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*
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* Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, <yu.liu@freescale.com>
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*
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* This file is derived from hw/ppc440_bamboo.c,
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* the copyright for that material belongs to the original owners.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <dirent.h>
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#include "config.h"
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#include "qemu-common.h"
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#include "net.h"
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#include "hw.h"
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#include "pc.h"
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#include "pci.h"
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#include "virtio-blk.h"
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#include "boards.h"
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#include "sysemu.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "device_tree.h"
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#include "openpic.h"
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#include "ppce500.h"
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#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
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#define UIMAGE_LOAD_BASE 0
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#define DTB_LOAD_BASE 0x600000
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#define INITRD_LOAD_BASE 0x2000000
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#define RAM_SIZES_ALIGN (64UL << 20)
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#define MPC8544_CCSRBAR_BASE 0xE0000000
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#define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000)
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#define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500)
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#define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600)
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#define MPC8544_PCI_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x8000)
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#define MPC8544_PCI_REGS_SIZE 0x1000
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#define MPC8544_PCI_IO 0xE1000000
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#define MPC8544_PCI_IOLEN 0x10000
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static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
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{
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uint32_t cell;
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int ret;
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ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
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if (ret < 0) {
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fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
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goto out;
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}
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ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
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prop, cell);
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if (ret < 0) {
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fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
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goto out;
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}
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out:
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return ret;
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}
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static void *mpc8544_load_device_tree(void *addr,
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uint32_t ramsize,
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_size,
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const char *kernel_cmdline)
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{
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void *fdt = NULL;
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#ifdef HAVE_FDT
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uint32_t mem_reg_property[] = {0, ramsize};
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char *path;
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int pathlen;
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int ret;
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pathlen = snprintf(NULL, 0, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE) + 1;
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path = qemu_malloc(pathlen);
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snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE);
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fdt = load_device_tree(path, addr);
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qemu_free(path);
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if (fdt == NULL)
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goto out;
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/* Manipulate device tree in memory. */
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ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
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sizeof(mem_reg_property));
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if (ret < 0)
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fprintf(stderr, "couldn't set /memory/reg\n");
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ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
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initrd_base);
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
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ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
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(initrd_base + initrd_size));
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
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ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
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kernel_cmdline);
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/bootargs\n");
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if (kvm_enabled()) {
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struct dirent *dirp;
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DIR *dp;
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char buf[128];
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if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
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printf("Can't open directory /proc/device-tree/cpus/\n");
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goto out;
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}
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buf[0] = '\0';
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while ((dirp = readdir(dp)) != NULL) {
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if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
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snprintf(buf, 128, "/cpus/%s", dirp->d_name);
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break;
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}
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}
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closedir(dp);
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if (buf[0] == '\0') {
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printf("Unknow host!\n");
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goto out;
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}
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mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
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mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
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}
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out:
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#endif
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return fdt;
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}
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static void mpc8544ds_init(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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PCIBus *pci_bus;
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CPUState *env;
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uint64_t elf_entry;
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uint64_t elf_lowaddr;
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target_ulong entry=0;
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target_ulong loadaddr=UIMAGE_LOAD_BASE;
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target_long kernel_size=0;
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target_ulong dt_base=DTB_LOAD_BASE;
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target_ulong initrd_base=INITRD_LOAD_BASE;
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target_long initrd_size=0;
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void *fdt;
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int i=0;
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unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
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qemu_irq *irqs, *mpic, *pci_irqs;
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SerialState * serial[2];
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/* Setup CPU */
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env = cpu_ppc_init("e500v2_v30");
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if (!env) {
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fprintf(stderr, "Unable to initialize CPU!\n");
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exit(1);
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}
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/* Fixup Memory size on a alignment boundary */
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ram_size &= ~(RAM_SIZES_ALIGN - 1);
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/* Register Memory */
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cpu_register_physical_memory(0, ram_size, 0);
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/* MPIC */
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irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
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irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
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mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
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/* Serial */
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if (serial_hds[0])
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serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
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0, mpic[12+26], 399193,
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serial_hds[0], 1);
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if (serial_hds[1])
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serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
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0, mpic[12+26], 399193,
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serial_hds[0], 1);
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/* PCI */
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pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
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pci_irqs[0] = mpic[pci_irq_nrs[0]];
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pci_irqs[1] = mpic[pci_irq_nrs[1]];
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pci_irqs[2] = mpic[pci_irq_nrs[2]];
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pci_irqs[3] = mpic[pci_irq_nrs[3]];
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pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
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if (!pci_bus)
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printf("couldn't create PCI controller!\n");
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isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
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if (pci_bus) {
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int unit_id = 0;
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/* Add virtio block devices. */
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while ((i = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
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virtio_blk_init(pci_bus, drives_table[i].bdrv);
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unit_id++;
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}
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/* Register network interfaces. */
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for (i = 0; i < nb_nics; i++) {
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pci_nic_init(pci_bus, &nd_table[i], -1, "virtio");
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}
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}
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/* Load kernel. */
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if (kernel_filename) {
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kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
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if (kernel_size < 0) {
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kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
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NULL);
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entry = elf_entry;
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loadaddr = elf_lowaddr;
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}
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/* XXX try again as binary */
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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kernel_filename);
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exit(1);
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}
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}
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/* Load initrd. */
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if (initrd_filename) {
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initrd_size = load_image(initrd_filename, phys_ram_base + initrd_base);
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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exit(1);
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}
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}
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/* If we're loading a kernel directly, we must load the device tree too. */
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if (kernel_filename) {
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fdt = mpc8544_load_device_tree(phys_ram_base + dt_base, ram_size,
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initrd_base, initrd_size, kernel_cmdline);
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if (fdt == NULL) {
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fprintf(stderr, "couldn't load device tree\n");
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exit(1);
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}
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/* Set initial guest state. */
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env->gpr[1] = (16<<20) - 8;
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env->gpr[3] = dt_base;
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env->nip = entry;
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/* XXX we currently depend on KVM to create some initial TLB entries. */
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}
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if (kvm_enabled())
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kvmppc_init();
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return;
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}
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QEMUMachine mpc8544ds_machine = {
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.name = "mpc8544ds",
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.desc = "mpc8544ds",
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.init = mpc8544ds_init,
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.ram_require = RAM_SIZES_ALIGN | RAMSIZE_FIXED,
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};
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@ -9,6 +9,7 @@ void register_machines(void)
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qemu_register_machine(&ref405ep_machine);
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qemu_register_machine(&taihu_machine);
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qemu_register_machine(&bamboo_machine);
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qemu_register_machine(&mpc8544ds_machine);
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}
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void cpu_save(QEMUFile *f, void *opaque)
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