target: e2k: Add %pcsp_hi and %pcsp_lo registers.
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8a8985961e
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27d235d092
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@ -97,7 +97,7 @@ void e2k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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unsigned int i;
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qemu_fprintf(f, "ip: " TARGET_FMT_lx "\n", env->ip);
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qemu_fprintf(f, "pregs: %016lx\n", env->pregs);
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qemu_fprintf(f, "pregs: %016lx\n", env->pf);
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qemu_fprintf(f, "usd_hi: %016lx, usd_lo: %016lx\n",
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env->usd_hi, env->usd_lo);
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qemu_fprintf(f, "cr1_hi: %016lx, cr1_lo: %016lx\n",
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@ -28,6 +28,21 @@ void e2k_tcg_initialize(void);
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#define CTPR_IPD_OFF 59
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#define CTPR_IPD_END 60
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#define PCSP_HI_IND_OFF 0 /* index for SPILL */
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#define PCSP_HI_IND_END 31
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#define PCSP_HI_IND_LEN (PCSP_HI_IND_END - PCSP_HI_IND_OFF + 1)
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#define PCSP_HI_SIZE_OFF 32
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#define PCSP_HI_SIZE_END 63 /* procedure stack chain size */
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#define PCSP_HI_SIZE_LEN (PCSP_HI_SIZE_END - PCSP_HI_SIZE_OFF + 1)
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#define PCSP_LO_BASE_OFF 0 /* procedure stack chain address */
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#define PCSP_LO_BASE_END 47
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#define PCSP_LO_BASE_LEN (PCSP_LO_BASE_END - PCSP_LO_BASE_OFF + 1)
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#define PCSP_LO_READ_OFF 59
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#define PCSP_LO_READ_BIT (1UL << PCSP_LO_READ_OFF)
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#define PCSP_LO_WRITE_OFF 60
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#define PCSP_LO_WRITE_BIT (1UL << PCSP_LO_WRITE_OFF)
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#define CR1_HI_BR_OFF 0
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#define CR1_HI_BR_END 27
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#define CR1_HI_BR_LEN (CR1_HI_BR_END - CR1_HI_BR_OFF + 1)
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@ -118,13 +133,18 @@ typedef struct CPUArchState {
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target_ulong gregs[32]; // global regs
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target_ulong wregs[WREGS_SIZE]; // window regs
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target_ulong *win_ptr;
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uint64_t pregs;
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uint64_t pf; /* predicate file */
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uint32_t wbs; // window regs offset
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uint32_t wsz; // window regs size
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uint32_t nfx; // TODO
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uint32_t dbl; // TODO
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uint64_t pcsp_hi;
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uint64_t pcsp_lo;
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/* cr0_hi == ip */
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/* cr0_lo == pf */
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uint64_t cr1_hi;
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uint64_t cr1_lo;
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@ -429,11 +429,13 @@ void e2k_tcg_initialize(void) {
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};
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static const struct { TCGv_i64 *ptr; int off; const char *name; } r64[] = {
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{ &e2k_cs.pregs, offsetof(CPUE2KState, pregs), "pregs" },
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{ &e2k_cs.usd_hi, offsetof(CPUE2KState, usd_hi), "usd.hi" },
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{ &e2k_cs.usd_lo, offsetof(CPUE2KState, usd_lo), "usd.lo" },
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{ &e2k_cs.pregs, offsetof(CPUE2KState, pf), "pregs" },
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{ &e2k_cs.pcsp_hi, offsetof(CPUE2KState, pcsp_hi), "pcsp_hi" },
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{ &e2k_cs.pcsp_lo, offsetof(CPUE2KState, pcsp_lo), "pcsp_lo" },
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{ &e2k_cs.cr1_hi, offsetof(CPUE2KState, cr1_hi), "cr1_hi" },
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{ &e2k_cs.cr1_lo, offsetof(CPUE2KState, cr1_lo), "cr1_lo" },
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{ &e2k_cs.usd_hi, offsetof(CPUE2KState, usd_hi), "usd.hi" },
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{ &e2k_cs.usd_lo, offsetof(CPUE2KState, usd_lo), "usd.lo" },
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{ &e2k_cs.lsr, offsetof(CPUE2KState, lsr), "lsr" },
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};
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@ -50,6 +50,8 @@ typedef struct CPUE2KStateTCG {
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TCGv_i32 wsz;
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TCGv_i32 nfx;
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TCGv_i32 dbl;
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TCGv_i64 pcsp_hi;
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TCGv_i64 pcsp_lo;
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TCGv_i64 cr1_hi;
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TCGv_i64 cr1_lo;
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TCGv_i64 lsr;
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