target/riscv: Add property check for Zvfh{min} extensions
Add check for Zvfh and Zvfhmin. Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230215020539.4788-7-liweiwei@iscas.ac.cn> [Palmer: commit text] Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -768,6 +768,20 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
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return;
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}
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if (cpu->cfg.ext_zvfh) {
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cpu->cfg.ext_zvfhmin = true;
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}
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if (cpu->cfg.ext_zvfhmin && !cpu->cfg.ext_zve32f) {
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error_setg(errp, "Zvfh/Zvfhmin extensions require Zve32f extension");
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return;
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}
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if (cpu->cfg.ext_zvfh && !cpu->cfg.ext_zfhmin) {
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error_setg(errp, "Zvfh extensions requires Zfhmin extension");
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return;
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}
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/* Set the ISA extensions, checks should have happened above */
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if (cpu->cfg.ext_zhinx) {
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cpu->cfg.ext_zhinxmin = true;
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