target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()
GDB LoongArch fpu use fcc register, update gdb_set_fpu() and gdb_get_fpu() to match it. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220805033523.1416837-6-gaosong@loongson.cn>
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@ -71,26 +71,6 @@ struct extctx_layout {
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struct ctx_layout end;
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};
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/* The kernel's sc_save_fcc macro is a sequence of MOVCF2GR+BSTRINS. */
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static uint64_t read_all_fcc(CPULoongArchState *env)
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{
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uint64_t ret = 0;
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for (int i = 0; i < 8; ++i) {
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ret |= (uint64_t)env->cf[i] << (i * 8);
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}
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return ret;
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}
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/* The kernel's sc_restore_fcc macro is a sequence of BSTRPICK+MOVGR2CF. */
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static void write_all_fcc(CPULoongArchState *env, uint64_t val)
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{
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for (int i = 0; i < 8; ++i) {
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env->cf[i] = (val >> (i * 8)) & 1;
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}
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}
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static abi_ptr extframe_alloc(struct extctx_layout *extctx,
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struct ctx_layout *sctx, unsigned size,
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unsigned align, abi_ptr orig_sp)
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@ -150,7 +130,7 @@ static void setup_sigframe(CPULoongArchState *env,
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for (i = 0; i < 32; ++i) {
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__put_user(env->fpr[i], &fpu_ctx->regs[i]);
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}
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__put_user(read_all_fcc(env), &fpu_ctx->fcc);
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__put_user(read_fcc(env), &fpu_ctx->fcc);
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__put_user(env->fcsr0, &fpu_ctx->fcsr);
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/*
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@ -216,7 +196,7 @@ static void restore_sigframe(CPULoongArchState *env,
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__get_user(env->fpr[i], &fpu_ctx->regs[i]);
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}
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__get_user(fcc, &fpu_ctx->fcc);
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write_all_fcc(env, fcc);
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write_fcc(env, fcc);
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__get_user(env->fcsr0, &fpu_ctx->fcsr);
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restore_fp_status(env);
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}
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@ -11,6 +11,24 @@
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#include "internals.h"
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#include "exec/gdbstub.h"
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uint64_t read_fcc(CPULoongArchState *env)
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{
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uint64_t ret = 0;
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for (int i = 0; i < 8; ++i) {
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ret |= (uint64_t)env->cf[i] << (i * 8);
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}
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return ret;
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}
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void write_fcc(CPULoongArchState *env, uint64_t val)
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{
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for (int i = 0; i < 8; ++i) {
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env->cf[i] = (val >> (i * 8)) & 1;
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}
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}
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int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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@ -51,9 +69,10 @@ static int loongarch_gdb_get_fpu(CPULoongArchState *env,
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{
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if (0 <= n && n < 32) {
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return gdb_get_reg64(mem_buf, env->fpr[n]);
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} else if (32 <= n && n < 40) {
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return gdb_get_reg8(mem_buf, env->cf[n - 32]);
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} else if (n == 40) {
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} else if (n == 32) {
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uint64_t val = read_fcc(env);
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return gdb_get_reg64(mem_buf, val);
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} else if (n == 33) {
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return gdb_get_reg32(mem_buf, env->fcsr0);
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}
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return 0;
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@ -67,10 +86,11 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env,
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if (0 <= n && n < 32) {
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env->fpr[n] = ldq_p(mem_buf);
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length = 8;
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} else if (32 <= n && n < 40) {
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env->cf[n - 32] = ldub_p(mem_buf);
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length = 1;
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} else if (n == 40) {
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} else if (n == 32) {
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uint64_t val = ldq_p(mem_buf);
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write_fcc(env, val);
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length = 8;
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} else if (n == 33) {
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env->fcsr0 = ldl_p(mem_buf);
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length = 4;
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}
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@ -51,6 +51,9 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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#endif /* !CONFIG_USER_ONLY */
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uint64_t read_fcc(CPULoongArchState *env);
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void write_fcc(CPULoongArchState *env, uint64_t val);
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int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
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int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
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void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
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