target/riscv: Export Svadu property
Set it default true for backward compatibility Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230224040852.37109-7-liweiwei@iscas.ac.cn> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -107,6 +107,7 @@ static const struct isa_ext_data isa_edata_arr[] = {
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ISA_EXT_DATA_ENTRY(ssaia, true, PRIV_VERSION_1_12_0, ext_ssaia),
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ISA_EXT_DATA_ENTRY(sscofpmf, true, PRIV_VERSION_1_12_0, ext_sscofpmf),
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ISA_EXT_DATA_ENTRY(sstc, true, PRIV_VERSION_1_12_0, ext_sstc),
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ISA_EXT_DATA_ENTRY(svadu, true, PRIV_VERSION_1_12_0, ext_svadu),
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ISA_EXT_DATA_ENTRY(svinval, true, PRIV_VERSION_1_12_0, ext_svinval),
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ISA_EXT_DATA_ENTRY(svnapot, true, PRIV_VERSION_1_12_0, ext_svnapot),
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ISA_EXT_DATA_ENTRY(svpbmt, true, PRIV_VERSION_1_12_0, ext_svpbmt),
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@ -1104,6 +1105,8 @@ static Property riscv_cpu_extensions[] = {
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DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),
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DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64),
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DEFINE_PROP_BOOL("svadu", RISCVCPU, cfg.ext_svadu, true),
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DEFINE_PROP_BOOL("svinval", RISCVCPU, cfg.ext_svinval, false),
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DEFINE_PROP_BOOL("svnapot", RISCVCPU, cfg.ext_svnapot, false),
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DEFINE_PROP_BOOL("svpbmt", RISCVCPU, cfg.ext_svpbmt, false),
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