target/hppa: Clean up DisasCond
The a0_is_n flag is redundant with comparing a0 to cpu_psw_n. The a1_is_0 flag can be removed by initializing a1 to $0, which also means that cond_prep can be removed entirely. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -252,8 +252,6 @@
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typedef struct DisasCond {
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TCGCond c;
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TCGv_reg a0, a1;
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bool a0_is_n;
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bool a1_is_0;
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} DisasCond;
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typedef struct DisasContext {
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@ -448,9 +446,7 @@ static DisasCond cond_make_n(void)
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return (DisasCond){
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.c = TCG_COND_NE,
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.a0 = cpu_psw_n,
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.a0_is_n = true,
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.a1 = NULL,
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.a1_is_0 = true
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.a1 = tcg_constant_reg(0)
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};
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}
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@ -458,7 +454,7 @@ static DisasCond cond_make_0_tmp(TCGCond c, TCGv_reg a0)
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{
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assert (c != TCG_COND_NEVER && c != TCG_COND_ALWAYS);
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return (DisasCond){
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.c = c, .a0 = a0, .a1_is_0 = true
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.c = c, .a0 = a0, .a1 = tcg_constant_reg(0)
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};
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}
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@ -482,26 +478,14 @@ static DisasCond cond_make(TCGCond c, TCGv_reg a0, TCGv_reg a1)
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return r;
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}
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static void cond_prep(DisasCond *cond)
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{
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if (cond->a1_is_0) {
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cond->a1_is_0 = false;
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cond->a1 = tcg_const_reg(0);
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}
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}
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static void cond_free(DisasCond *cond)
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{
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switch (cond->c) {
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default:
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if (!cond->a0_is_n) {
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if (cond->a0 != cpu_psw_n) {
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tcg_temp_free(cond->a0);
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}
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if (!cond->a1_is_0) {
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tcg_temp_free(cond->a1);
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}
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cond->a0_is_n = false;
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cond->a1_is_0 = false;
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tcg_temp_free(cond->a1);
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cond->a0 = NULL;
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cond->a1 = NULL;
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/* fallthru */
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@ -559,9 +543,8 @@ static TCGv_reg dest_gpr(DisasContext *ctx, unsigned reg)
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static void save_or_nullify(DisasContext *ctx, TCGv_reg dest, TCGv_reg t)
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{
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if (ctx->null_cond.c != TCG_COND_NEVER) {
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cond_prep(&ctx->null_cond);
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tcg_gen_movcond_reg(ctx->null_cond.c, dest, ctx->null_cond.a0,
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ctx->null_cond.a1, dest, t);
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ctx->null_cond.a1, dest, t);
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} else {
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tcg_gen_mov_reg(dest, t);
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}
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@ -668,11 +651,9 @@ static void nullify_over(DisasContext *ctx)
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assert(ctx->null_cond.c != TCG_COND_ALWAYS);
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ctx->null_lab = gen_new_label();
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cond_prep(&ctx->null_cond);
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/* If we're using PSW[N], copy it to a temp because... */
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if (ctx->null_cond.a0_is_n) {
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ctx->null_cond.a0_is_n = false;
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if (ctx->null_cond.a0 == cpu_psw_n) {
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ctx->null_cond.a0 = tcg_temp_new();
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tcg_gen_mov_reg(ctx->null_cond.a0, cpu_psw_n);
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}
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@ -685,7 +666,7 @@ static void nullify_over(DisasContext *ctx)
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}
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tcg_gen_brcond_reg(ctx->null_cond.c, ctx->null_cond.a0,
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ctx->null_cond.a1, ctx->null_lab);
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ctx->null_cond.a1, ctx->null_lab);
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cond_free(&ctx->null_cond);
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}
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}
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@ -699,10 +680,9 @@ static void nullify_save(DisasContext *ctx)
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}
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return;
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}
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if (!ctx->null_cond.a0_is_n) {
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cond_prep(&ctx->null_cond);
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if (ctx->null_cond.a0 != cpu_psw_n) {
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tcg_gen_setcond_reg(ctx->null_cond.c, cpu_psw_n,
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ctx->null_cond.a0, ctx->null_cond.a1);
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ctx->null_cond.a0, ctx->null_cond.a1);
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ctx->psw_n_nonzero = true;
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}
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cond_free(&ctx->null_cond);
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@ -1178,7 +1158,6 @@ static void do_add(DisasContext *ctx, unsigned rt, TCGv_reg in1,
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/* Emit any conditional trap before any writeback. */
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cond = do_cond(cf, dest, cb_msb, sv);
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if (is_tc) {
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cond_prep(&cond);
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tmp = tcg_temp_new();
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tcg_gen_setcond_reg(cond.c, tmp, cond.a0, cond.a1);
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gen_helper_tcond(cpu_env, tmp);
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@ -1273,7 +1252,6 @@ static void do_sub(DisasContext *ctx, unsigned rt, TCGv_reg in1,
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/* Emit any conditional trap before any writeback. */
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if (is_tc) {
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cond_prep(&cond);
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tmp = tcg_temp_new();
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tcg_gen_setcond_reg(cond.c, tmp, cond.a0, cond.a1);
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gen_helper_tcond(cpu_env, tmp);
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@ -1399,7 +1377,6 @@ static void do_unit(DisasContext *ctx, unsigned rt, TCGv_reg in1,
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if (is_tc) {
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TCGv_reg tmp = tcg_temp_new();
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cond_prep(&cond);
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tcg_gen_setcond_reg(cond.c, tmp, cond.a0, cond.a1);
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gen_helper_tcond(cpu_env, tmp);
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tcg_temp_free(tmp);
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@ -1855,7 +1832,6 @@ static bool do_cbranch(DisasContext *ctx, target_sreg disp, bool is_n,
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}
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taken = gen_new_label();
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cond_prep(cond);
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tcg_gen_brcond_reg(c, cond->a0, cond->a1, taken);
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cond_free(cond);
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@ -1952,7 +1928,6 @@ static bool do_ibranch(DisasContext *ctx, TCGv_reg dest,
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tcg_gen_lookup_and_goto_ptr();
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return nullify_end(ctx);
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} else {
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cond_prep(&ctx->null_cond);
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c = ctx->null_cond.c;
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a0 = ctx->null_cond.a0;
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a1 = ctx->null_cond.a1;
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