Really fix cas
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
d60bb01cbb
commit
71817e4898
|
@ -4178,12 +4178,11 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
unsigned int xop = GET_FIELD(insn, 7, 12);
|
unsigned int xop = GET_FIELD(insn, 7, 12);
|
||||||
|
|
||||||
cpu_src1 = get_src1(insn, cpu_src1);
|
cpu_src1 = get_src1(insn, cpu_src1);
|
||||||
if (xop == 0x3c || xop == 0x3e)
|
if (xop == 0x3c || xop == 0x3e) { // V9 casa/casxa
|
||||||
{
|
|
||||||
rs2 = GET_FIELD(insn, 27, 31);
|
rs2 = GET_FIELD(insn, 27, 31);
|
||||||
gen_movl_reg_TN(rs2, cpu_src2);
|
gen_movl_reg_TN(rs2, cpu_src2);
|
||||||
}
|
tcg_gen_mov_tl(cpu_addr, cpu_src1);
|
||||||
else if (IS_IMM) { /* immediate */
|
} else if (IS_IMM) { /* immediate */
|
||||||
rs2 = GET_FIELDs(insn, 19, 31);
|
rs2 = GET_FIELDs(insn, 19, 31);
|
||||||
tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2);
|
tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2);
|
||||||
} else { /* register */
|
} else { /* register */
|
||||||
|
@ -4615,11 +4614,11 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd));
|
gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd));
|
||||||
break;
|
break;
|
||||||
case 0x3c: /* V9 casa */
|
case 0x3c: /* V9 casa */
|
||||||
gen_cas_asi(cpu_val, cpu_addr, cpu_val, insn, rd);
|
gen_cas_asi(cpu_val, cpu_addr, cpu_src2, insn, rd);
|
||||||
gen_movl_TN_reg(rd, cpu_val);
|
gen_movl_TN_reg(rd, cpu_val);
|
||||||
break;
|
break;
|
||||||
case 0x3e: /* V9 casxa */
|
case 0x3e: /* V9 casxa */
|
||||||
gen_casx_asi(cpu_val, cpu_addr, cpu_val, insn, rd);
|
gen_casx_asi(cpu_val, cpu_addr, cpu_src2, insn, rd);
|
||||||
gen_movl_TN_reg(rd, cpu_val);
|
gen_movl_TN_reg(rd, cpu_val);
|
||||||
break;
|
break;
|
||||||
#else
|
#else
|
||||||
|
|
Loading…
Reference in New Issue