Hexagon (target/hexagon) Reduce manipulation of slot_cancelled
We only need to track slot for predicated stores and predicated HVX instructions. Add arguments to the probe helper functions to indicate if the slot is predicated. Here is a simple example of the differences in the TCG code generated: IN: 0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) } BEFORE ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 mov_i32 r2,new_r2 AFTER ---- 00400094 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 set_label $L2 mov_i32 r2,new_r2 Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-14-tsimpson@quicinc.com>
This commit is contained in:
parent
e28b77a6b4
commit
7b84fd04bd
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@ -5,7 +5,7 @@
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%{
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%{
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/*
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/*
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* Copyright(c) 2019-2022 rev.ng Labs Srl. All Rights Reserved.
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* Copyright(c) 2019-2023 rev.ng Labs Srl. All Rights Reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -312,7 +312,7 @@ STRING_LIT \"(\\.|[^"\\])*\"
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"fREAD_PC()" { return PC; }
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"fREAD_PC()" { return PC; }
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"USR.LPCFG" { return LPCFG; }
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"USR.LPCFG" { return LPCFG; }
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"LOAD_CANCEL(EA)" { return LOAD_CANCEL; }
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"LOAD_CANCEL(EA)" { return LOAD_CANCEL; }
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"STORE_CANCEL(EA)" |
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"STORE_CANCEL(EA)" { return STORE_CANCEL; }
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"CANCEL" { return CANCEL; }
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"CANCEL" { return CANCEL; }
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"N"{LOWER_ID}"N" { yylval->rvalue.type = REGISTER_ARG;
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"N"{LOWER_ID}"N" { yylval->rvalue.type = REGISTER_ARG;
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yylval->rvalue.reg.type = DOTNEW;
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yylval->rvalue.reg.type = DOTNEW;
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@ -1,6 +1,6 @@
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%{
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%{
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/*
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/*
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* Copyright(c) 2019-2022 rev.ng Labs Srl. All Rights Reserved.
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* Copyright(c) 2019-2023 rev.ng Labs Srl. All Rights Reserved.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ -53,7 +53,7 @@
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%token ABS CROUND ROUND CIRCADD COUNTONES INC DEC ANDA ORA XORA PLUSPLUS ASL
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%token ABS CROUND ROUND CIRCADD COUNTONES INC DEC ANDA ORA XORA PLUSPLUS ASL
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%token ASR LSR EQ NEQ LTE GTE MIN MAX ANDL FOR ICIRC IF MUN FSCR FCHK SXT
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%token ASR LSR EQ NEQ LTE GTE MIN MAX ANDL FOR ICIRC IF MUN FSCR FCHK SXT
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%token ZXT CONSTEXT LOCNT BREV SIGN LOAD STORE PC LPCFG
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%token ZXT CONSTEXT LOCNT BREV SIGN LOAD STORE PC LPCFG
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%token LOAD_CANCEL CANCEL IDENTITY ROTL INSBITS SETBITS EXTRANGE
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%token LOAD_CANCEL STORE_CANCEL CANCEL IDENTITY ROTL INSBITS SETBITS EXTRANGE
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%token CAST4_8U FAIL CARRY_FROM_ADD ADDSAT64 LSBNEW
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%token CAST4_8U FAIL CARRY_FROM_ADD ADDSAT64 LSBNEW
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%token TYPE_SIZE_T TYPE_INT TYPE_SIGNED TYPE_UNSIGNED TYPE_LONG
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%token TYPE_SIZE_T TYPE_INT TYPE_SIGNED TYPE_UNSIGNED TYPE_LONG
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@ -412,10 +412,11 @@ cancel_statement : LOAD_CANCEL
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{
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{
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gen_load_cancel(c, &@1);
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gen_load_cancel(c, &@1);
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}
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}
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| CANCEL
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| STORE_CANCEL
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{
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{
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gen_cancel(c, &@1);
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gen_cancel(c, &@1);
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}
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}
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| CANCEL
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;
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;
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if_statement : if_stmt
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if_statement : if_stmt
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@ -1727,7 +1727,6 @@ void gen_cancel(Context *c, YYLTYPE *locp)
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void gen_load_cancel(Context *c, YYLTYPE *locp)
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void gen_load_cancel(Context *c, YYLTYPE *locp)
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{
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{
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gen_cancel(c, locp);
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OUT(c, locp, "if (insn->slot == 0 && pkt->pkt_has_store_s1) {\n");
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OUT(c, locp, "if (insn->slot == 0 && pkt->pkt_has_store_s1) {\n");
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OUT(c, locp, "ctx->s1_store_processed = false;\n");
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OUT(c, locp, "ctx->s1_store_processed = false;\n");
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OUT(c, locp, "process_store(ctx, 1);\n");
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OUT(c, locp, "process_store(ctx, 1);\n");
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@ -205,7 +205,7 @@ static inline void gen_cancel(uint32_t slot)
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#define CANCEL gen_cancel(slot);
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#define CANCEL gen_cancel(slot);
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#else
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#else
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#define CANCEL cancel_slot(env, slot)
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#define CANCEL do { } while (0)
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#endif
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#endif
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#define LOAD_CANCEL(EA) do { CANCEL; } while (0)
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#define LOAD_CANCEL(EA) do { CANCEL; } while (0)
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@ -30,6 +30,7 @@
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#include "mmvec/mmvec.h"
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#include "mmvec/mmvec.h"
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#include "mmvec/macros.h"
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#include "mmvec/macros.h"
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#include "op_helper.h"
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#include "op_helper.h"
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#include "translate.h"
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#define SF_BIAS 127
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#define SF_BIAS 127
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#define SF_MANTBITS 23
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#define SF_MANTBITS 23
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@ -415,9 +416,10 @@ int32_t HELPER(vacsh_pred)(CPUHexagonState *env,
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return PeV;
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return PeV;
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}
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}
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static void probe_store(CPUHexagonState *env, int slot, int mmu_idx)
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static void probe_store(CPUHexagonState *env, int slot, int mmu_idx,
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bool is_predicated)
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{
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{
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if (!(env->slot_cancelled & (1 << slot))) {
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if (!is_predicated || !(env->slot_cancelled & (1 << slot))) {
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size1u_t width = env->mem_log_stores[slot].width;
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size1u_t width = env->mem_log_stores[slot].width;
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target_ulong va = env->mem_log_stores[slot].va;
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target_ulong va = env->mem_log_stores[slot].va;
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uintptr_t ra = GETPC();
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uintptr_t ra = GETPC();
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@ -437,9 +439,12 @@ void HELPER(probe_noshuf_load)(CPUHexagonState *env, target_ulong va,
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}
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}
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/* Called during packet commit when there are two scalar stores */
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/* Called during packet commit when there are two scalar stores */
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void HELPER(probe_pkt_scalar_store_s0)(CPUHexagonState *env, int mmu_idx)
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void HELPER(probe_pkt_scalar_store_s0)(CPUHexagonState *env, int args)
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{
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{
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probe_store(env, 0, mmu_idx);
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int mmu_idx = FIELD_EX32(args, PROBE_PKT_SCALAR_STORE_S0, MMU_IDX);
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bool is_predicated =
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FIELD_EX32(args, PROBE_PKT_SCALAR_STORE_S0, IS_PREDICATED);
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probe_store(env, 0, mmu_idx, is_predicated);
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}
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}
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void HELPER(probe_hvx_stores)(CPUHexagonState *env, int mmu_idx)
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void HELPER(probe_hvx_stores)(CPUHexagonState *env, int mmu_idx)
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@ -486,15 +491,18 @@ void HELPER(probe_hvx_stores)(CPUHexagonState *env, int mmu_idx)
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void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
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void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
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int mmu_idx)
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int mmu_idx)
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{
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{
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bool has_st0 = (mask >> 0) & 1;
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bool has_st0 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST0);
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bool has_st1 = (mask >> 1) & 1;
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bool has_st1 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1);
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bool has_hvx_stores = (mask >> 2) & 1;
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bool has_hvx_stores =
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FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES);
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bool s0_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED);
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bool s1_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED);
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if (has_st0) {
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if (has_st0) {
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probe_store(env, 0, mmu_idx);
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probe_store(env, 0, mmu_idx, s0_is_pred);
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}
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}
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if (has_st1) {
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if (has_st1) {
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probe_store(env, 1, mmu_idx);
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probe_store(env, 1, mmu_idx, s1_is_pred);
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}
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}
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if (has_hvx_stores) {
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if (has_hvx_stores) {
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HELPER(probe_hvx_stores)(env, mmu_idx);
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HELPER(probe_hvx_stores)(env, mmu_idx);
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@ -1444,12 +1452,6 @@ void HELPER(vwhist128qm)(CPUHexagonState *env, int32_t uiV)
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}
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}
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}
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}
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void cancel_slot(CPUHexagonState *env, uint32_t slot)
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{
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HEX_DEBUG_LOG("Slot %d cancelled\n", slot);
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env->slot_cancelled |= (1 << slot);
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}
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/* These macros can be referenced in the generated helper functions */
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/* These macros can be referenced in the generated helper functions */
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#define warn(...) /* Nothing */
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#define warn(...) /* Nothing */
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#define fatal(...) g_assert_not_reached();
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#define fatal(...) g_assert_not_reached();
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -19,7 +19,6 @@
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#define HEXAGON_OP_HELPER_H
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#define HEXAGON_OP_HELPER_H
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/* Misc functions */
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/* Misc functions */
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void cancel_slot(CPUHexagonState *env, uint32_t slot);
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void write_new_pc(CPUHexagonState *env, bool pkt_has_multi_cof, target_ulong addr);
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void write_new_pc(CPUHexagonState *env, bool pkt_has_multi_cof, target_ulong addr);
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uint8_t mem_load1(CPUHexagonState *env, uint32_t slot, target_ulong vaddr);
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uint8_t mem_load1(CPUHexagonState *env, uint32_t slot, target_ulong vaddr);
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@ -248,7 +248,16 @@ static bool check_for_attrib(Packet *pkt, int attrib)
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static bool need_slot_cancelled(Packet *pkt)
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static bool need_slot_cancelled(Packet *pkt)
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{
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{
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return check_for_attrib(pkt, A_CONDEXEC);
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/* We only need slot_cancelled for conditional store and HVX instructions */
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for (int i = 0; i < pkt->num_insns; i++) {
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uint16_t opcode = pkt->insn[i].opcode;
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if (GET_ATTRIB(opcode, A_CONDEXEC) &&
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(GET_ATTRIB(opcode, A_STORE) ||
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GET_ATTRIB(opcode, A_CVI))) {
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return true;
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}
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}
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return false;
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}
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}
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static bool need_pred_written(Packet *pkt)
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static bool need_pred_written(Packet *pkt)
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TCGv mask_tcgv;
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TCGv mask_tcgv;
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if (has_store_s0) {
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if (has_store_s0) {
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mask |= (1 << 0);
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mask =
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST0, 1);
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}
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}
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if (has_store_s1) {
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if (has_store_s1) {
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mask |= (1 << 1);
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mask =
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1, 1);
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}
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}
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if (has_hvx_store) {
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if (has_hvx_store) {
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mask |= (1 << 2);
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mask =
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES,
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HAS_HVX_STORES, 1);
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}
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if (has_store_s0 && slot_is_predicated(pkt, 0)) {
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mask =
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES,
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S0_IS_PRED, 1);
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}
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if (has_store_s1 && slot_is_predicated(pkt, 1)) {
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mask =
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FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES,
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S1_IS_PRED, 1);
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}
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}
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mask_tcgv = tcg_constant_tl(mask);
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mask_tcgv = tcg_constant_tl(mask);
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gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, mask_tcgv, mem_idx);
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gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, mask_tcgv, mem_idx);
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* process_store_log will execute the slot 1 store first,
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* process_store_log will execute the slot 1 store first,
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* so we only have to probe the store in slot 0
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* so we only have to probe the store in slot 0
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*/
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*/
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TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
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int args = 0;
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gen_helper_probe_pkt_scalar_store_s0(cpu_env, mem_idx);
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args =
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FIELD_DP32(args, PROBE_PKT_SCALAR_STORE_S0, MMU_IDX, ctx->mem_idx);
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if (slot_is_predicated(pkt, 0)) {
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args =
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FIELD_DP32(args, PROBE_PKT_SCALAR_STORE_S0, IS_PREDICATED, 1);
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}
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TCGv args_tcgv = tcg_constant_tl(args);
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gen_helper_probe_pkt_scalar_store_s0(cpu_env, args_tcgv);
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}
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}
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process_store_log(ctx);
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process_store_log(ctx);
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@ -172,4 +172,14 @@ extern TCGv hex_vstore_pending[VSTORES_MAX];
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bool is_gather_store_insn(DisasContext *ctx);
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bool is_gather_store_insn(DisasContext *ctx);
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void process_store(DisasContext *ctx, int slot_num);
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void process_store(DisasContext *ctx, int slot_num);
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FIELD(PROBE_PKT_SCALAR_STORE_S0, MMU_IDX, 0, 2)
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FIELD(PROBE_PKT_SCALAR_STORE_S0, IS_PREDICATED, 2, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_ST0, 0, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1, 1, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES, 2, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED, 3, 1)
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FIELD(PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED, 4, 1)
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#endif
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#endif
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