target/mips: Fix SWM32 handling for microMIPS
SWM32 should store a sequence of 32-bit words from the GPRs, but it was
incorrectly coded to store 16-bit words only. As a result, an LWM32 that
usually follows would restore invalid register values.
Fixes: 7dd547e5ab
("target/mips: Use cpu_*_mmuidx_ra instead of
MMU_MODE*_SUFFIX")
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230216051717.3911212-3-marcin.nowakowski@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -248,14 +248,14 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
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target_ulong i;
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for (i = 0; i < base_reglist; i++) {
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cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
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cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
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mem_idx, GETPC());
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addr += 4;
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}
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}
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if (do_r31) {
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cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
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cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
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}
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}
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