Use OBJECT_DECLARE_SIMPLE_TYPE when possible

This converts existing DECLARE_INSTANCE_CHECKER usage to
OBJECT_DECLARE_SIMPLE_TYPE when possible.

$ ./scripts/codeconverter/converter.py -i \
  --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]')

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Paul Durrant <paul@xen.org>
Message-Id: <20200916182519.415636-6-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost 2020-09-16 14:25:19 -04:00
parent a489d1951c
commit 8063396bf3
505 changed files with 609 additions and 1795 deletions

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@ -35,10 +35,7 @@
*/ */
#define TYPE_CRYPTODEV_BACKEND_BUILTIN "cryptodev-backend-builtin" #define TYPE_CRYPTODEV_BACKEND_BUILTIN "cryptodev-backend-builtin"
typedef struct CryptoDevBackendBuiltin OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN)
CryptoDevBackendBuiltin;
DECLARE_INSTANCE_CHECKER(CryptoDevBackendBuiltin, CRYPTODEV_BACKEND_BUILTIN,
TYPE_CRYPTODEV_BACKEND_BUILTIN)
typedef struct CryptoDevBackendBuiltinSession { typedef struct CryptoDevBackendBuiltinSession {

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@ -39,9 +39,7 @@
*/ */
#define TYPE_CRYPTODEV_BACKEND_VHOST_USER "cryptodev-vhost-user" #define TYPE_CRYPTODEV_BACKEND_VHOST_USER "cryptodev-vhost-user"
typedef struct CryptoDevBackendVhostUser CryptoDevBackendVhostUser; OBJECT_DECLARE_SIMPLE_TYPE(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER)
DECLARE_INSTANCE_CHECKER(CryptoDevBackendVhostUser, CRYPTODEV_BACKEND_VHOST_USER,
TYPE_CRYPTODEV_BACKEND_VHOST_USER)
struct CryptoDevBackendVhostUser { struct CryptoDevBackendVhostUser {

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@ -19,9 +19,7 @@
#include "qom/object_interfaces.h" #include "qom/object_interfaces.h"
#include "qom/object.h" #include "qom/object.h"
typedef struct HostMemoryBackendFile HostMemoryBackendFile; OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendFile, MEMORY_BACKEND_FILE)
DECLARE_INSTANCE_CHECKER(HostMemoryBackendFile, MEMORY_BACKEND_FILE,
TYPE_MEMORY_BACKEND_FILE)
struct HostMemoryBackendFile { struct HostMemoryBackendFile {

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@ -21,9 +21,7 @@
#define TYPE_MEMORY_BACKEND_MEMFD "memory-backend-memfd" #define TYPE_MEMORY_BACKEND_MEMFD "memory-backend-memfd"
typedef struct HostMemoryBackendMemfd HostMemoryBackendMemfd; OBJECT_DECLARE_SIMPLE_TYPE(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD)
DECLARE_INSTANCE_CHECKER(HostMemoryBackendMemfd, MEMORY_BACKEND_MEMFD,
TYPE_MEMORY_BACKEND_MEMFD)
struct HostMemoryBackendMemfd { struct HostMemoryBackendMemfd {

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@ -11,9 +11,7 @@
#include "qemu/guest-random.h" #include "qemu/guest-random.h"
#include "qom/object.h" #include "qom/object.h"
typedef struct RngBuiltin RngBuiltin; OBJECT_DECLARE_SIMPLE_TYPE(RngBuiltin, RNG_BUILTIN)
DECLARE_INSTANCE_CHECKER(RngBuiltin, RNG_BUILTIN,
TYPE_RNG_BUILTIN)
struct RngBuiltin { struct RngBuiltin {
RngBackend parent; RngBackend parent;

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@ -19,9 +19,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_RNG_EGD "rng-egd" #define TYPE_RNG_EGD "rng-egd"
typedef struct RngEgd RngEgd; OBJECT_DECLARE_SIMPLE_TYPE(RngEgd, RNG_EGD)
DECLARE_INSTANCE_CHECKER(RngEgd, RNG_EGD,
TYPE_RNG_EGD)
struct RngEgd { struct RngEgd {
RngBackend parent; RngBackend parent;

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@ -45,9 +45,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_TPM_EMULATOR "tpm-emulator" #define TYPE_TPM_EMULATOR "tpm-emulator"
typedef struct TPMEmulator TPMEmulator; OBJECT_DECLARE_SIMPLE_TYPE(TPMEmulator, TPM_EMULATOR)
DECLARE_INSTANCE_CHECKER(TPMEmulator, TPM_EMULATOR,
TYPE_TPM_EMULATOR)
#define TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(S, cap) (((S)->caps & (cap)) == (cap)) #define TPM_EMULATOR_IMPLEMENTS_ALL_CAPS(S, cap) (((S)->caps & (cap)) == (cap))

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@ -36,9 +36,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_TPM_PASSTHROUGH "tpm-passthrough" #define TYPE_TPM_PASSTHROUGH "tpm-passthrough"
typedef struct TPMPassthruState TPMPassthruState; OBJECT_DECLARE_SIMPLE_TYPE(TPMPassthruState, TPM_PASSTHROUGH)
DECLARE_INSTANCE_CHECKER(TPMPassthruState, TPM_PASSTHROUGH,
TYPE_TPM_PASSTHROUGH)
/* data structures */ /* data structures */
struct TPMPassthruState { struct TPMPassthruState {

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@ -13,10 +13,8 @@ struct V9fsVirtioState {
VirtQueueElement *elems[MAX_REQ]; VirtQueueElement *elems[MAX_REQ];
V9fsState state; V9fsState state;
}; };
typedef struct V9fsVirtioState V9fsVirtioState;
#define TYPE_VIRTIO_9P "virtio-9p-device" #define TYPE_VIRTIO_9P "virtio-9p-device"
DECLARE_INSTANCE_CHECKER(V9fsVirtioState, VIRTIO_9P, OBJECT_DECLARE_SIMPLE_TYPE(V9fsVirtioState, VIRTIO_9P)
TYPE_VIRTIO_9P)
#endif #endif

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@ -91,10 +91,8 @@ struct PIIX4PMState {
MemHotplugState acpi_memory_hotplug; MemHotplugState acpi_memory_hotplug;
}; };
typedef struct PIIX4PMState PIIX4PMState;
DECLARE_INSTANCE_CHECKER(PIIX4PMState, PIIX4_PM, OBJECT_DECLARE_SIMPLE_TYPE(PIIX4PMState, PIIX4_PM)
TYPE_PIIX4_PM)
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
PCIBus *bus, PIIX4PMState *s); PCIBus *bus, PIIX4PMState *s);

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@ -50,9 +50,7 @@ typedef struct TyphoonPchip {
TyphoonWindow win[4]; TyphoonWindow win[4];
} TyphoonPchip; } TyphoonPchip;
typedef struct TyphoonState TyphoonState; OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE)
DECLARE_INSTANCE_CHECKER(TyphoonState, TYPHOON_PCI_HOST_BRIDGE,
TYPE_TYPHOON_PCI_HOST_BRIDGE)
struct TyphoonState { struct TyphoonState {
PCIHostState parent_obj; PCIHostState parent_obj;

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@ -25,11 +25,9 @@ struct CollieMachineState {
StrongARMState *sa1110; StrongARMState *sa1110;
}; };
typedef struct CollieMachineState CollieMachineState;
#define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie") #define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie")
DECLARE_INSTANCE_CHECKER(CollieMachineState, COLLIE_MACHINE, OBJECT_DECLARE_SIMPLE_TYPE(CollieMachineState, COLLIE_MACHINE)
TYPE_COLLIE_MACHINE)
static struct arm_boot_info collie_binfo = { static struct arm_boot_info collie_binfo = {
.loader_start = SA_SDCS0, .loader_start = SA_SDCS0,

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@ -156,9 +156,7 @@ static const MemoryRegionOps hb_mem_ops = {
}; };
#define TYPE_HIGHBANK_REGISTERS "highbank-regs" #define TYPE_HIGHBANK_REGISTERS "highbank-regs"
typedef struct HighbankRegsState HighbankRegsState; OBJECT_DECLARE_SIMPLE_TYPE(HighbankRegsState, HIGHBANK_REGISTERS)
DECLARE_INSTANCE_CHECKER(HighbankRegsState, HIGHBANK_REGISTERS,
TYPE_HIGHBANK_REGISTERS)
struct HighbankRegsState { struct HighbankRegsState {
/*< private >*/ /*< private >*/

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@ -29,9 +29,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_INTEGRATOR_CM "integrator_core" #define TYPE_INTEGRATOR_CM "integrator_core"
typedef struct IntegratorCMState IntegratorCMState; OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM)
DECLARE_INSTANCE_CHECKER(IntegratorCMState, INTEGRATOR_CM,
TYPE_INTEGRATOR_CM)
struct IntegratorCMState { struct IntegratorCMState {
/*< private >*/ /*< private >*/
@ -328,9 +326,7 @@ static void integratorcm_realize(DeviceState *d, Error **errp)
/* Primary interrupt controller. */ /* Primary interrupt controller. */
#define TYPE_INTEGRATOR_PIC "integrator_pic" #define TYPE_INTEGRATOR_PIC "integrator_pic"
typedef struct icp_pic_state icp_pic_state; OBJECT_DECLARE_SIMPLE_TYPE(icp_pic_state, INTEGRATOR_PIC)
DECLARE_INSTANCE_CHECKER(icp_pic_state, INTEGRATOR_PIC,
TYPE_INTEGRATOR_PIC)
struct icp_pic_state { struct icp_pic_state {
/*< private >*/ /*< private >*/
@ -468,9 +464,7 @@ static void icp_pic_init(Object *obj)
/* CP control registers. */ /* CP control registers. */
#define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs" #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
typedef struct ICPCtrlRegsState ICPCtrlRegsState; OBJECT_DECLARE_SIMPLE_TYPE(ICPCtrlRegsState, ICP_CONTROL_REGS)
DECLARE_INSTANCE_CHECKER(ICPCtrlRegsState, ICP_CONTROL_REGS,
TYPE_ICP_CONTROL_REGS)
struct ICPCtrlRegsState { struct ICPCtrlRegsState {
/*< private >*/ /*< private >*/

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@ -26,12 +26,10 @@ struct MicrobitMachineState {
NRF51State nrf51; NRF51State nrf51;
MicrobitI2CState i2c; MicrobitI2CState i2c;
}; };
typedef struct MicrobitMachineState MicrobitMachineState;
#define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit") #define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
DECLARE_INSTANCE_CHECKER(MicrobitMachineState, MICROBIT_MACHINE, OBJECT_DECLARE_SIMPLE_TYPE(MicrobitMachineState, MICROBIT_MACHINE)
TYPE_MICROBIT_MACHINE)
static void microbit_init(MachineState *machine) static void microbit_init(MachineState *machine)
{ {

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@ -155,9 +155,7 @@ typedef struct mv88w8618_rx_desc {
} mv88w8618_rx_desc; } mv88w8618_rx_desc;
#define TYPE_MV88W8618_ETH "mv88w8618_eth" #define TYPE_MV88W8618_ETH "mv88w8618_eth"
typedef struct mv88w8618_eth_state mv88w8618_eth_state; OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_eth_state, MV88W8618_ETH)
DECLARE_INSTANCE_CHECKER(mv88w8618_eth_state, MV88W8618_ETH,
TYPE_MV88W8618_ETH)
struct mv88w8618_eth_state { struct mv88w8618_eth_state {
/*< private >*/ /*< private >*/
@ -485,9 +483,7 @@ static const TypeInfo mv88w8618_eth_info = {
#define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */ #define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */
#define TYPE_MUSICPAL_LCD "musicpal_lcd" #define TYPE_MUSICPAL_LCD "musicpal_lcd"
typedef struct musicpal_lcd_state musicpal_lcd_state; OBJECT_DECLARE_SIMPLE_TYPE(musicpal_lcd_state, MUSICPAL_LCD)
DECLARE_INSTANCE_CHECKER(musicpal_lcd_state, MUSICPAL_LCD,
TYPE_MUSICPAL_LCD)
struct musicpal_lcd_state { struct musicpal_lcd_state {
/*< private >*/ /*< private >*/
@ -703,9 +699,7 @@ static const TypeInfo musicpal_lcd_info = {
#define MP_PIC_ENABLE_CLR 0x0C #define MP_PIC_ENABLE_CLR 0x0C
#define TYPE_MV88W8618_PIC "mv88w8618_pic" #define TYPE_MV88W8618_PIC "mv88w8618_pic"
typedef struct mv88w8618_pic_state mv88w8618_pic_state; OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pic_state, MV88W8618_PIC)
DECLARE_INSTANCE_CHECKER(mv88w8618_pic_state, MV88W8618_PIC,
TYPE_MV88W8618_PIC)
struct mv88w8618_pic_state { struct mv88w8618_pic_state {
/*< private >*/ /*< private >*/
@ -841,9 +835,7 @@ typedef struct mv88w8618_timer_state {
} mv88w8618_timer_state; } mv88w8618_timer_state;
#define TYPE_MV88W8618_PIT "mv88w8618_pit" #define TYPE_MV88W8618_PIT "mv88w8618_pit"
typedef struct mv88w8618_pit_state mv88w8618_pit_state; OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pit_state, MV88W8618_PIT)
DECLARE_INSTANCE_CHECKER(mv88w8618_pit_state, MV88W8618_PIT,
TYPE_MV88W8618_PIT)
struct mv88w8618_pit_state { struct mv88w8618_pit_state {
/*< private >*/ /*< private >*/
@ -1009,9 +1001,7 @@ static const TypeInfo mv88w8618_pit_info = {
#define MP_FLASHCFG_CFGR0 0x04 #define MP_FLASHCFG_CFGR0 0x04
#define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg" #define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg"
typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state; OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG)
DECLARE_INSTANCE_CHECKER(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG,
TYPE_MV88W8618_FLASHCFG)
struct mv88w8618_flashcfg_state { struct mv88w8618_flashcfg_state {
/*< private >*/ /*< private >*/
@ -1100,11 +1090,9 @@ struct MusicPalMiscState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
MemoryRegion iomem; MemoryRegion iomem;
}; };
typedef struct MusicPalMiscState MusicPalMiscState;
#define TYPE_MUSICPAL_MISC "musicpal-misc" #define TYPE_MUSICPAL_MISC "musicpal-misc"
DECLARE_INSTANCE_CHECKER(MusicPalMiscState, MUSICPAL_MISC, OBJECT_DECLARE_SIMPLE_TYPE(MusicPalMiscState, MUSICPAL_MISC)
TYPE_MUSICPAL_MISC)
static uint64_t musicpal_misc_read(void *opaque, hwaddr offset, static uint64_t musicpal_misc_read(void *opaque, hwaddr offset,
unsigned size) unsigned size)
@ -1209,9 +1197,7 @@ static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp)
#define MP_OE_LCD_BRIGHTNESS 0x0007 #define MP_OE_LCD_BRIGHTNESS 0x0007
#define TYPE_MUSICPAL_GPIO "musicpal_gpio" #define TYPE_MUSICPAL_GPIO "musicpal_gpio"
typedef struct musicpal_gpio_state musicpal_gpio_state; OBJECT_DECLARE_SIMPLE_TYPE(musicpal_gpio_state, MUSICPAL_GPIO)
DECLARE_INSTANCE_CHECKER(musicpal_gpio_state, MUSICPAL_GPIO,
TYPE_MUSICPAL_GPIO)
struct musicpal_gpio_state { struct musicpal_gpio_state {
/*< private >*/ /*< private >*/
@ -1460,9 +1446,7 @@ static const TypeInfo musicpal_gpio_info = {
#define MP_KEY_BTN_NAVIGATION (1 << 7) #define MP_KEY_BTN_NAVIGATION (1 << 7)
#define TYPE_MUSICPAL_KEY "musicpal_key" #define TYPE_MUSICPAL_KEY "musicpal_key"
typedef struct musicpal_key_state musicpal_key_state; OBJECT_DECLARE_SIMPLE_TYPE(musicpal_key_state, MUSICPAL_KEY)
DECLARE_INSTANCE_CHECKER(musicpal_key_state, MUSICPAL_KEY,
TYPE_MUSICPAL_KEY)
struct musicpal_key_state { struct musicpal_key_state {
/*< private >*/ /*< private >*/

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@ -133,9 +133,7 @@ static void palmte_button_event(void *opaque, int keycode)
*/ */
#define TYPE_PALM_MISC_GPIO "palm-misc-gpio" #define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
typedef struct PalmMiscGPIOState PalmMiscGPIOState; OBJECT_DECLARE_SIMPLE_TYPE(PalmMiscGPIOState, PALM_MISC_GPIO)
DECLARE_INSTANCE_CHECKER(PalmMiscGPIOState, PALM_MISC_GPIO,
TYPE_PALM_MISC_GPIO)
struct PalmMiscGPIOState { struct PalmMiscGPIOState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

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@ -470,9 +470,7 @@ static const VMStateDescription vmstate_pxa2xx_mm = {
}; };
#define TYPE_PXA2XX_SSP "pxa2xx-ssp" #define TYPE_PXA2XX_SSP "pxa2xx-ssp"
typedef struct PXA2xxSSPState PXA2xxSSPState; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxSSPState, PXA2XX_SSP)
DECLARE_INSTANCE_CHECKER(PXA2xxSSPState, PXA2XX_SSP,
TYPE_PXA2XX_SSP)
/* Synchronous Serial Ports */ /* Synchronous Serial Ports */
struct PXA2xxSSPState { struct PXA2xxSSPState {
@ -811,9 +809,7 @@ static void pxa2xx_ssp_init(Object *obj)
#define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */ #define PIAR 0x38 /* RTC Periodic Interrupt Alarm register */
#define TYPE_PXA2XX_RTC "pxa2xx_rtc" #define TYPE_PXA2XX_RTC "pxa2xx_rtc"
typedef struct PXA2xxRTCState PXA2xxRTCState; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxRTCState, PXA2XX_RTC)
DECLARE_INSTANCE_CHECKER(PXA2xxRTCState, PXA2XX_RTC,
TYPE_PXA2XX_RTC)
struct PXA2xxRTCState { struct PXA2xxRTCState {
/*< private >*/ /*< private >*/
@ -1245,9 +1241,7 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = {
/* I2C Interface */ /* I2C Interface */
#define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave" #define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave"
typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE)
DECLARE_INSTANCE_CHECKER(PXA2xxI2CSlaveState, PXA2XX_I2C_SLAVE,
TYPE_PXA2XX_I2C_SLAVE)
struct PXA2xxI2CSlaveState { struct PXA2xxI2CSlaveState {
I2CSlave parent_obj; I2CSlave parent_obj;

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@ -22,9 +22,7 @@
#define PXA2XX_GPIO_BANKS 4 #define PXA2XX_GPIO_BANKS 4
#define TYPE_PXA2XX_GPIO "pxa2xx-gpio" #define TYPE_PXA2XX_GPIO "pxa2xx-gpio"
typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxGPIOInfo, PXA2XX_GPIO)
DECLARE_INSTANCE_CHECKER(PXA2xxGPIOInfo, PXA2XX_GPIO,
TYPE_PXA2XX_GPIO)
struct PXA2xxGPIOInfo { struct PXA2xxGPIOInfo {
/*< private >*/ /*< private >*/

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@ -38,9 +38,7 @@
#define PXA2XX_PIC_SRCS 40 #define PXA2XX_PIC_SRCS 40
#define TYPE_PXA2XX_PIC "pxa2xx_pic" #define TYPE_PXA2XX_PIC "pxa2xx_pic"
typedef struct PXA2xxPICState PXA2xxPICState; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxPICState, PXA2XX_PIC)
DECLARE_INSTANCE_CHECKER(PXA2xxPICState, PXA2XX_PIC,
TYPE_PXA2XX_PIC)
struct PXA2xxPICState { struct PXA2xxPICState {
/*< private >*/ /*< private >*/

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@ -95,11 +95,9 @@ struct SBSAMachineState {
DeviceState *gic; DeviceState *gic;
PFlashCFI01 *flash[2]; PFlashCFI01 *flash[2];
}; };
typedef struct SBSAMachineState SBSAMachineState;
#define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref") #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref")
DECLARE_INSTANCE_CHECKER(SBSAMachineState, SBSA_MACHINE, OBJECT_DECLARE_SIMPLE_TYPE(SBSAMachineState, SBSA_MACHINE)
TYPE_SBSA_MACHINE)
static const MemMapEntry sbsa_ref_memmap[] = { static const MemMapEntry sbsa_ref_memmap[] = {
/* 512M boot ROM */ /* 512M boot ROM */

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@ -81,9 +81,7 @@ OBJECT_DECLARE_TYPE(SpitzMachineState, SpitzMachineClass, SPITZ_MACHINE)
#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
#define TYPE_SL_NAND "sl-nand" #define TYPE_SL_NAND "sl-nand"
typedef struct SLNANDState SLNANDState; OBJECT_DECLARE_SIMPLE_TYPE(SLNANDState, SL_NAND)
DECLARE_INSTANCE_CHECKER(SLNANDState, SL_NAND,
TYPE_SL_NAND)
struct SLNANDState { struct SLNANDState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -259,9 +257,7 @@ static const int spitz_gpiomap[5] = {
}; };
#define TYPE_SPITZ_KEYBOARD "spitz-keyboard" #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
typedef struct SpitzKeyboardState SpitzKeyboardState; OBJECT_DECLARE_SIMPLE_TYPE(SpitzKeyboardState, SPITZ_KEYBOARD)
DECLARE_INSTANCE_CHECKER(SpitzKeyboardState, SPITZ_KEYBOARD,
TYPE_SPITZ_KEYBOARD)
struct SpitzKeyboardState { struct SpitzKeyboardState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -579,9 +575,7 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
#define LCDTG_POLCTRL 0x07 #define LCDTG_POLCTRL 0x07
#define TYPE_SPITZ_LCDTG "spitz-lcdtg" #define TYPE_SPITZ_LCDTG "spitz-lcdtg"
typedef struct SpitzLCDTG SpitzLCDTG; OBJECT_DECLARE_SIMPLE_TYPE(SpitzLCDTG, SPITZ_LCDTG)
DECLARE_INSTANCE_CHECKER(SpitzLCDTG, SPITZ_LCDTG,
TYPE_SPITZ_LCDTG)
struct SpitzLCDTG { struct SpitzLCDTG {
SSISlave ssidev; SSISlave ssidev;
@ -669,9 +663,7 @@ static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
#define SPITZ_GPIO_TP_INT 11 #define SPITZ_GPIO_TP_INT 11
#define TYPE_CORGI_SSP "corgi-ssp" #define TYPE_CORGI_SSP "corgi-ssp"
typedef struct CorgiSSPState CorgiSSPState; OBJECT_DECLARE_SIMPLE_TYPE(CorgiSSPState, CORGI_SSP)
DECLARE_INSTANCE_CHECKER(CorgiSSPState, CORGI_SSP,
TYPE_CORGI_SSP)
/* "Demux" the signal based on current chipselect */ /* "Demux" the signal based on current chipselect */
struct CorgiSSPState { struct CorgiSSPState {
@ -822,9 +814,7 @@ static void spitz_akita_i2c_setup(PXA2xxState *cpu)
* + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x * + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
*/ */
#define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio" #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
typedef struct SpitzMiscGPIOState SpitzMiscGPIOState; OBJECT_DECLARE_SIMPLE_TYPE(SpitzMiscGPIOState, SPITZ_MISC_GPIO)
DECLARE_INSTANCE_CHECKER(SpitzMiscGPIOState, SPITZ_MISC_GPIO,
TYPE_SPITZ_MISC_GPIO)
struct SpitzMiscGPIOState { struct SpitzMiscGPIOState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

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@ -58,9 +58,7 @@ typedef const struct {
/* General purpose timer module. */ /* General purpose timer module. */
#define TYPE_STELLARIS_GPTM "stellaris-gptm" #define TYPE_STELLARIS_GPTM "stellaris-gptm"
typedef struct gptm_state gptm_state; OBJECT_DECLARE_SIMPLE_TYPE(gptm_state, STELLARIS_GPTM)
DECLARE_INSTANCE_CHECKER(gptm_state, STELLARIS_GPTM,
TYPE_STELLARIS_GPTM)
struct gptm_state { struct gptm_state {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -721,9 +719,7 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
/* I2C controller. */ /* I2C controller. */
#define TYPE_STELLARIS_I2C "stellaris-i2c" #define TYPE_STELLARIS_I2C "stellaris-i2c"
typedef struct stellaris_i2c_state stellaris_i2c_state; OBJECT_DECLARE_SIMPLE_TYPE(stellaris_i2c_state, STELLARIS_I2C)
DECLARE_INSTANCE_CHECKER(stellaris_i2c_state, STELLARIS_I2C,
TYPE_STELLARIS_I2C)
struct stellaris_i2c_state { struct stellaris_i2c_state {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -85,9 +85,7 @@ static struct {
/* Interrupt Controller */ /* Interrupt Controller */
#define TYPE_STRONGARM_PIC "strongarm_pic" #define TYPE_STRONGARM_PIC "strongarm_pic"
typedef struct StrongARMPICState StrongARMPICState; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPICState, STRONGARM_PIC)
DECLARE_INSTANCE_CHECKER(StrongARMPICState, STRONGARM_PIC,
TYPE_STRONGARM_PIC)
struct StrongARMPICState { struct StrongARMPICState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -254,9 +252,7 @@ static const TypeInfo strongarm_pic_info = {
* f = 32 768 / (RTTR_trim + 1) */ * f = 32 768 / (RTTR_trim + 1) */
#define TYPE_STRONGARM_RTC "strongarm-rtc" #define TYPE_STRONGARM_RTC "strongarm-rtc"
typedef struct StrongARMRTCState StrongARMRTCState; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMRTCState, STRONGARM_RTC)
DECLARE_INSTANCE_CHECKER(StrongARMRTCState, STRONGARM_RTC,
TYPE_STRONGARM_RTC)
struct StrongARMRTCState { struct StrongARMRTCState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -481,9 +477,7 @@ static const TypeInfo strongarm_rtc_sysbus_info = {
#define GAFR 0x1c #define GAFR 0x1c
#define TYPE_STRONGARM_GPIO "strongarm-gpio" #define TYPE_STRONGARM_GPIO "strongarm-gpio"
typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMGPIOInfo, STRONGARM_GPIO)
DECLARE_INSTANCE_CHECKER(StrongARMGPIOInfo, STRONGARM_GPIO,
TYPE_STRONGARM_GPIO)
struct StrongARMGPIOInfo { struct StrongARMGPIOInfo {
SysBusDevice busdev; SysBusDevice busdev;
@ -720,9 +714,7 @@ static const TypeInfo strongarm_gpio_info = {
#define PPFR 0x10 #define PPFR 0x10
#define TYPE_STRONGARM_PPC "strongarm-ppc" #define TYPE_STRONGARM_PPC "strongarm-ppc"
typedef struct StrongARMPPCInfo StrongARMPPCInfo; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMPPCInfo, STRONGARM_PPC)
DECLARE_INSTANCE_CHECKER(StrongARMPPCInfo, STRONGARM_PPC,
TYPE_STRONGARM_PPC)
struct StrongARMPPCInfo { struct StrongARMPPCInfo {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -921,9 +913,7 @@ static const TypeInfo strongarm_ppc_info = {
#define RX_FIFO_ROR (1 << 10) #define RX_FIFO_ROR (1 << 10)
#define TYPE_STRONGARM_UART "strongarm-uart" #define TYPE_STRONGARM_UART "strongarm-uart"
typedef struct StrongARMUARTState StrongARMUARTState; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMUARTState, STRONGARM_UART)
DECLARE_INSTANCE_CHECKER(StrongARMUARTState, STRONGARM_UART,
TYPE_STRONGARM_UART)
struct StrongARMUARTState { struct StrongARMUARTState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -1353,9 +1343,7 @@ static const TypeInfo strongarm_uart_info = {
/* Synchronous Serial Ports */ /* Synchronous Serial Ports */
#define TYPE_STRONGARM_SSP "strongarm-ssp" #define TYPE_STRONGARM_SSP "strongarm-ssp"
typedef struct StrongARMSSPState StrongARMSSPState; OBJECT_DECLARE_SIMPLE_TYPE(StrongARMSSPState, STRONGARM_SSP)
DECLARE_INSTANCE_CHECKER(StrongARMSSPState, STRONGARM_SSP,
TYPE_STRONGARM_SSP)
struct StrongARMSSPState { struct StrongARMSSPState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -75,9 +75,7 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
*/ */
#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio" #define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
typedef struct TosaMiscGPIOState TosaMiscGPIOState; OBJECT_DECLARE_SIMPLE_TYPE(TosaMiscGPIOState, TOSA_MISC_GPIO)
DECLARE_INSTANCE_CHECKER(TosaMiscGPIOState, TOSA_MISC_GPIO,
TYPE_TOSA_MISC_GPIO)
struct TosaMiscGPIOState { struct TosaMiscGPIOState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -172,9 +170,7 @@ static void tosa_ssp_realize(SSISlave *dev, Error **errp)
} }
#define TYPE_TOSA_DAC "tosa_dac" #define TYPE_TOSA_DAC "tosa_dac"
typedef struct TosaDACState TosaDACState; OBJECT_DECLARE_SIMPLE_TYPE(TosaDACState, TOSA_DAC)
DECLARE_INSTANCE_CHECKER(TosaDACState, TOSA_DAC,
TYPE_TOSA_DAC)
struct TosaDACState { struct TosaDACState {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -35,9 +35,7 @@
/* Primary interrupt controller. */ /* Primary interrupt controller. */
#define TYPE_VERSATILE_PB_SIC "versatilepb_sic" #define TYPE_VERSATILE_PB_SIC "versatilepb_sic"
typedef struct vpb_sic_state vpb_sic_state; OBJECT_DECLARE_SIMPLE_TYPE(vpb_sic_state, VERSATILE_PB_SIC)
DECLARE_INSTANCE_CHECKER(vpb_sic_state, VERSATILE_PB_SIC,
TYPE_VERSATILE_PB_SIC)
struct vpb_sic_state { struct vpb_sic_state {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -40,9 +40,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
typedef struct ZynqMachineState ZynqMachineState; OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
DECLARE_INSTANCE_CHECKER(ZynqMachineState, ZYNQ_MACHINE,
TYPE_ZYNQ_MACHINE)
/* board base frequency: 33.333333 MHz */ /* board base frequency: 33.333333 MHz */
#define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3) #define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)

View File

@ -25,9 +25,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
typedef struct VersalVirt VersalVirt; OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
DECLARE_INSTANCE_CHECKER(VersalVirt, XLNX_VERSAL_VIRT_MACHINE,
TYPE_XLNX_VERSAL_VIRT_MACHINE)
struct VersalVirt { struct VersalVirt {
MachineState parent_obj; MachineState parent_obj;

View File

@ -36,11 +36,9 @@ struct XlnxZCU102 {
struct arm_boot_info binfo; struct arm_boot_info binfo;
}; };
typedef struct XlnxZCU102 XlnxZCU102;
#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102") #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
DECLARE_INSTANCE_CHECKER(XlnxZCU102, ZCU102_MACHINE, OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE)
TYPE_ZCU102_MACHINE)
static bool zcu102_get_secure(Object *obj, Error **errp) static bool zcu102_get_secure(Object *obj, Error **errp)

View File

@ -111,11 +111,9 @@ struct ZipitLCD {
uint32_t cur_reg; uint32_t cur_reg;
int pos; int pos;
}; };
typedef struct ZipitLCD ZipitLCD;
#define TYPE_ZIPIT_LCD "zipit-lcd" #define TYPE_ZIPIT_LCD "zipit-lcd"
DECLARE_INSTANCE_CHECKER(ZipitLCD, ZIPIT_LCD, OBJECT_DECLARE_SIMPLE_TYPE(ZipitLCD, ZIPIT_LCD)
TYPE_ZIPIT_LCD)
static uint32_t zipit_lcd_transfer(SSISlave *dev, uint32_t value) static uint32_t zipit_lcd_transfer(SSISlave *dev, uint32_t value)
{ {
@ -198,9 +196,7 @@ static const TypeInfo zipit_lcd_info = {
}; };
#define TYPE_AER915 "aer915" #define TYPE_AER915 "aer915"
typedef struct AER915State AER915State; OBJECT_DECLARE_SIMPLE_TYPE(AER915State, AER915)
DECLARE_INSTANCE_CHECKER(AER915State, AER915,
TYPE_AER915)
struct AER915State { struct AER915State {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -127,9 +127,7 @@ enum {
#define MUTE_SHIFT 15 #define MUTE_SHIFT 15
#define TYPE_AC97 "AC97" #define TYPE_AC97 "AC97"
typedef struct AC97LinkState AC97LinkState; OBJECT_DECLARE_SIMPLE_TYPE(AC97LinkState, AC97)
DECLARE_INSTANCE_CHECKER(AC97LinkState, AC97,
TYPE_AC97)
#define REC_MASK 7 #define REC_MASK 7
enum { enum {

View File

@ -52,9 +52,7 @@
#define SHIFT 1 #define SHIFT 1
#define TYPE_ADLIB "adlib" #define TYPE_ADLIB "adlib"
typedef struct AdlibState AdlibState; OBJECT_DECLARE_SIMPLE_TYPE(AdlibState, ADLIB)
DECLARE_INSTANCE_CHECKER(AdlibState, ADLIB,
TYPE_ADLIB)
struct AdlibState { struct AdlibState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -293,8 +293,7 @@ struct chan_bits {
}; };
#define TYPE_ES1370 "ES1370" #define TYPE_ES1370 "ES1370"
DECLARE_INSTANCE_CHECKER(ES1370State, ES1370, OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370)
TYPE_ES1370)
static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
uint32_t *old_freq, uint32_t *new_freq); uint32_t *old_freq, uint32_t *new_freq);

View File

@ -43,9 +43,7 @@
#endif #endif
#define TYPE_GUS "gus" #define TYPE_GUS "gus"
typedef struct GUSState GUSState; OBJECT_DECLARE_SIMPLE_TYPE(GUSState, GUS)
DECLARE_INSTANCE_CHECKER(GUSState, GUS,
TYPE_GUS)
struct GUSState { struct GUSState {
ISADevice dev; ISADevice dev;

View File

@ -172,8 +172,7 @@ struct HDAAudioStream {
}; };
#define TYPE_HDA_AUDIO "hda-audio" #define TYPE_HDA_AUDIO "hda-audio"
DECLARE_INSTANCE_CHECKER(HDAAudioState, HDA_AUDIO, OBJECT_DECLARE_SIMPLE_TYPE(HDAAudioState, HDA_AUDIO)
TYPE_HDA_AUDIO)
struct HDAAudioState { struct HDAAudioState {
HDACodecDevice hda; HDACodecDevice hda;

View File

@ -12,9 +12,7 @@ OBJECT_DECLARE_TYPE(HDACodecDevice, HDACodecDeviceClass,
HDA_CODEC_DEVICE) HDA_CODEC_DEVICE)
#define TYPE_HDA_BUS "HDA" #define TYPE_HDA_BUS "HDA"
typedef struct HDACodecBus HDACodecBus; OBJECT_DECLARE_SIMPLE_TYPE(HDACodecBus, HDA_BUS)
DECLARE_INSTANCE_CHECKER(HDACodecBus, HDA_BUS,
TYPE_HDA_BUS)
typedef void (*hda_codec_response_func)(HDACodecDevice *dev, typedef void (*hda_codec_response_func)(HDACodecDevice *dev,

View File

@ -43,9 +43,7 @@
#define MP_AUDIO_CLOCK_24MHZ (1 << 9) #define MP_AUDIO_CLOCK_24MHZ (1 << 9)
#define MP_AUDIO_MONO (1 << 14) #define MP_AUDIO_MONO (1 << 14)
typedef struct mv88w8618_audio_state mv88w8618_audio_state; OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_audio_state, MV88W8618_AUDIO)
DECLARE_INSTANCE_CHECKER(mv88w8618_audio_state, MV88W8618_AUDIO,
TYPE_MV88W8618_AUDIO)
struct mv88w8618_audio_state { struct mv88w8618_audio_state {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -56,9 +56,7 @@ enum {
}; };
#define TYPE_MILKYMIST_AC97 "milkymist-ac97" #define TYPE_MILKYMIST_AC97 "milkymist-ac97"
typedef struct MilkymistAC97State MilkymistAC97State; OBJECT_DECLARE_SIMPLE_TYPE(MilkymistAC97State, MILKYMIST_AC97)
DECLARE_INSTANCE_CHECKER(MilkymistAC97State, MILKYMIST_AC97,
TYPE_MILKYMIST_AC97)
struct MilkymistAC97State { struct MilkymistAC97State {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -40,9 +40,7 @@
#define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1) #define PCSPK_MAX_FREQ (PCSPK_SAMPLE_RATE >> 1)
#define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ) #define PCSPK_MIN_COUNT DIV_ROUND_UP(PIT_FREQ, PCSPK_MAX_FREQ)
typedef struct PCSpkState PCSpkState; OBJECT_DECLARE_SIMPLE_TYPE(PCSpkState, PC_SPEAKER)
DECLARE_INSTANCE_CHECKER(PCSpkState, PC_SPEAKER,
TYPE_PC_SPEAKER)
struct PCSpkState { struct PCSpkState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -78,9 +78,7 @@ typedef struct {
} pl041_channel; } pl041_channel;
#define TYPE_PL041 "pl041" #define TYPE_PL041 "pl041"
typedef struct PL041State PL041State; OBJECT_DECLARE_SIMPLE_TYPE(PL041State, PL041)
DECLARE_INSTANCE_CHECKER(PL041State, PL041,
TYPE_PL041)
struct PL041State { struct PL041State {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -50,9 +50,7 @@
static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992."; static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
#define TYPE_SB16 "sb16" #define TYPE_SB16 "sb16"
typedef struct SB16State SB16State; OBJECT_DECLARE_SIMPLE_TYPE(SB16State, SB16)
DECLARE_INSTANCE_CHECKER(SB16State, SB16,
TYPE_SB16)
struct SB16State { struct SB16State {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -27,9 +27,7 @@ typedef struct {
int dac_hz; int dac_hz;
} WMRate; } WMRate;
typedef struct WM8750State WM8750State; OBJECT_DECLARE_SIMPLE_TYPE(WM8750State, WM8750)
DECLARE_INSTANCE_CHECKER(WM8750State, WM8750,
TYPE_WM8750)
struct WM8750State { struct WM8750State {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -65,9 +65,7 @@
/* qdev floppy bus */ /* qdev floppy bus */
#define TYPE_FLOPPY_BUS "floppy-bus" #define TYPE_FLOPPY_BUS "floppy-bus"
typedef struct FloppyBus FloppyBus; OBJECT_DECLARE_SIMPLE_TYPE(FloppyBus, FLOPPY_BUS)
DECLARE_INSTANCE_CHECKER(FloppyBus, FLOPPY_BUS,
TYPE_FLOPPY_BUS)
typedef struct FDCtrl FDCtrl; typedef struct FDCtrl FDCtrl;
typedef struct FDrive FDrive; typedef struct FDrive FDrive;
@ -497,9 +495,7 @@ static const BlockDevOps fd_block_ops = {
#define TYPE_FLOPPY_DRIVE "floppy" #define TYPE_FLOPPY_DRIVE "floppy"
typedef struct FloppyDrive FloppyDrive; OBJECT_DECLARE_SIMPLE_TYPE(FloppyDrive, FLOPPY_DRIVE)
DECLARE_INSTANCE_CHECKER(FloppyDrive, FLOPPY_DRIVE,
TYPE_FLOPPY_DRIVE)
struct FloppyDrive { struct FloppyDrive {
DeviceState qdev; DeviceState qdev;
@ -890,9 +886,7 @@ static FloppyDriveType get_fallback_drive_type(FDrive *drv)
} }
#define TYPE_SYSBUS_FDC "base-sysbus-fdc" #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
typedef struct FDCtrlSysBus FDCtrlSysBus; OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlSysBus, SYSBUS_FDC)
DECLARE_INSTANCE_CHECKER(FDCtrlSysBus, SYSBUS_FDC,
TYPE_SYSBUS_FDC)
struct FDCtrlSysBus { struct FDCtrlSysBus {
/*< private >*/ /*< private >*/
@ -902,9 +896,7 @@ struct FDCtrlSysBus {
struct FDCtrl state; struct FDCtrl state;
}; };
typedef struct FDCtrlISABus FDCtrlISABus; OBJECT_DECLARE_SIMPLE_TYPE(FDCtrlISABus, ISA_FDC)
DECLARE_INSTANCE_CHECKER(FDCtrlISABus, ISA_FDC,
TYPE_ISA_FDC)
struct FDCtrlISABus { struct FDCtrlISABus {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -90,8 +90,7 @@ struct NANDFlashState {
#define TYPE_NAND "nand" #define TYPE_NAND "nand"
DECLARE_INSTANCE_CHECKER(NANDFlashState, NAND, OBJECT_DECLARE_SIMPLE_TYPE(NANDFlashState, NAND)
TYPE_NAND)
static void mem_and(uint8_t *dest, const uint8_t *src, size_t n) static void mem_and(uint8_t *dest, const uint8_t *src, size_t n)
{ {

View File

@ -40,9 +40,7 @@
#define BLOCK_SHIFT (PAGE_SHIFT + 6) #define BLOCK_SHIFT (PAGE_SHIFT + 6)
#define TYPE_ONE_NAND "onenand" #define TYPE_ONE_NAND "onenand"
typedef struct OneNANDState OneNANDState; OBJECT_DECLARE_SIMPLE_TYPE(OneNANDState, ONE_NAND)
DECLARE_INSTANCE_CHECKER(OneNANDState, ONE_NAND,
TYPE_ONE_NAND)
struct OneNANDState { struct OneNANDState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -33,9 +33,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon" #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
typedef struct ISADebugconState ISADebugconState; OBJECT_DECLARE_SIMPLE_TYPE(ISADebugconState, ISA_DEBUGCON_DEVICE)
DECLARE_INSTANCE_CHECKER(ISADebugconState, ISA_DEBUGCON_DEVICE,
TYPE_ISA_DEBUGCON_DEVICE)
//#define DEBUG_DEBUGCON //#define DEBUG_DEBUGCON

View File

@ -139,9 +139,7 @@ typedef struct {
} Exynos4210UartFIFO; } Exynos4210UartFIFO;
#define TYPE_EXYNOS4210_UART "exynos4210.uart" #define TYPE_EXYNOS4210_UART "exynos4210.uart"
typedef struct Exynos4210UartState Exynos4210UartState; OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210UartState, EXYNOS4210_UART)
DECLARE_INSTANCE_CHECKER(Exynos4210UartState, EXYNOS4210_UART,
TYPE_EXYNOS4210_UART)
struct Exynos4210UartState { struct Exynos4210UartState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -73,9 +73,7 @@
#define FIFO_LENGTH 1024 #define FIFO_LENGTH 1024
typedef struct UART UART; OBJECT_DECLARE_SIMPLE_TYPE(UART, GRLIB_APB_UART)
DECLARE_INSTANCE_CHECKER(UART, GRLIB_APB_UART,
TYPE_GRLIB_APB_UART)
struct UART { struct UART {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -123,8 +123,7 @@ struct IPOctalState {
#define TYPE_IPOCTAL "ipoctal232" #define TYPE_IPOCTAL "ipoctal232"
DECLARE_INSTANCE_CHECKER(IPOctalState, IPOCTAL, OBJECT_DECLARE_SIMPLE_TYPE(IPOctalState, IPOCTAL)
TYPE_IPOCTAL)
static const VMStateDescription vmstate_scc2698_channel = { static const VMStateDescription vmstate_scc2698_channel = {
.name = "scc2698_channel", .name = "scc2698_channel",

View File

@ -42,9 +42,7 @@ enum {
JRX_FULL = (1<<8), JRX_FULL = (1<<8),
}; };
typedef struct LM32JuartState LM32JuartState; OBJECT_DECLARE_SIMPLE_TYPE(LM32JuartState, LM32_JUART)
DECLARE_INSTANCE_CHECKER(LM32JuartState, LM32_JUART,
TYPE_LM32_JUART)
struct LM32JuartState { struct LM32JuartState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -95,9 +95,7 @@ enum {
}; };
#define TYPE_LM32_UART "lm32-uart" #define TYPE_LM32_UART "lm32-uart"
typedef struct LM32UartState LM32UartState; OBJECT_DECLARE_SIMPLE_TYPE(LM32UartState, LM32_UART)
DECLARE_INSTANCE_CHECKER(LM32UartState, LM32_UART,
TYPE_LM32_UART)
struct LM32UartState { struct LM32UartState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -35,11 +35,9 @@ struct mcf_uart_state {
qemu_irq irq; qemu_irq irq;
CharBackend chr; CharBackend chr;
}; };
typedef struct mcf_uart_state mcf_uart_state;
#define TYPE_MCF_UART "mcf-uart" #define TYPE_MCF_UART "mcf-uart"
DECLARE_INSTANCE_CHECKER(mcf_uart_state, MCF_UART, OBJECT_DECLARE_SIMPLE_TYPE(mcf_uart_state, MCF_UART)
TYPE_MCF_UART)
/* UART Status Register bits. */ /* UART Status Register bits. */
#define MCF_UART_RxRDY 0x01 #define MCF_UART_RxRDY 0x01

View File

@ -58,9 +58,7 @@ enum {
}; };
#define TYPE_MILKYMIST_UART "milkymist-uart" #define TYPE_MILKYMIST_UART "milkymist-uart"
typedef struct MilkymistUartState MilkymistUartState; OBJECT_DECLARE_SIMPLE_TYPE(MilkymistUartState, MILKYMIST_UART)
DECLARE_INSTANCE_CHECKER(MilkymistUartState, MILKYMIST_UART,
TYPE_MILKYMIST_UART)
struct MilkymistUartState { struct MilkymistUartState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -93,9 +93,7 @@ typedef struct ParallelState {
} ParallelState; } ParallelState;
#define TYPE_ISA_PARALLEL "isa-parallel" #define TYPE_ISA_PARALLEL "isa-parallel"
typedef struct ISAParallelState ISAParallelState; OBJECT_DECLARE_SIMPLE_TYPE(ISAParallelState, ISA_PARALLEL)
DECLARE_INSTANCE_CHECKER(ISAParallelState, ISA_PARALLEL,
TYPE_ISA_PARALLEL)
struct ISAParallelState { struct ISAParallelState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -34,9 +34,7 @@
#include "migration/vmstate.h" #include "migration/vmstate.h"
#include "qom/object.h" #include "qom/object.h"
typedef struct ISASerialState ISASerialState; OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL)
DECLARE_INSTANCE_CHECKER(ISASerialState, ISA_SERIAL,
TYPE_ISA_SERIAL)
struct ISASerialState { struct ISASerialState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -40,11 +40,9 @@ struct PCISerialState {
SerialState state; SerialState state;
uint8_t prog_if; uint8_t prog_if;
}; };
typedef struct PCISerialState PCISerialState;
#define TYPE_PCI_SERIAL "pci-serial" #define TYPE_PCI_SERIAL "pci-serial"
DECLARE_INSTANCE_CHECKER(PCISerialState, PCI_SERIAL, OBJECT_DECLARE_SIMPLE_TYPE(PCISerialState, PCI_SERIAL)
TYPE_PCI_SERIAL)
static void serial_pci_realize(PCIDevice *dev, Error **errp) static void serial_pci_realize(PCIDevice *dev, Error **errp)
{ {

View File

@ -18,11 +18,9 @@ struct SpaprVioVty {
uint32_t in, out; uint32_t in, out;
uint8_t buf[VTERM_BUFSIZE]; uint8_t buf[VTERM_BUFSIZE];
}; };
typedef struct SpaprVioVty SpaprVioVty;
#define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty" #define TYPE_VIO_SPAPR_VTY_DEVICE "spapr-vty"
DECLARE_INSTANCE_CHECKER(SpaprVioVty, VIO_SPAPR_VTY_DEVICE, OBJECT_DECLARE_SIMPLE_TYPE(SpaprVioVty, VIO_SPAPR_VTY_DEVICE)
TYPE_VIO_SPAPR_VTY_DEVICE)
static int vty_can_receive(void *opaque) static int vty_can_receive(void *opaque)
{ {

View File

@ -53,9 +53,7 @@
#define CONTROL_IE 0x10 #define CONTROL_IE 0x10
#define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite" #define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite"
typedef struct XilinxUARTLite XilinxUARTLite; OBJECT_DECLARE_SIMPLE_TYPE(XilinxUARTLite, XILINX_UARTLITE)
DECLARE_INSTANCE_CHECKER(XilinxUARTLite, XILINX_UARTLITE,
TYPE_XILINX_UARTLITE)
struct XilinxUARTLite { struct XilinxUARTLite {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -18,9 +18,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore" #define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore"
typedef struct mpcore_rirq_state mpcore_rirq_state; OBJECT_DECLARE_SIMPLE_TYPE(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ)
DECLARE_INSTANCE_CHECKER(mpcore_rirq_state, REALVIEW_MPCORE_RIRQ,
TYPE_REALVIEW_MPCORE_RIRQ)
/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ /* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
controllers. The output of these, plus some of the raw input lines controllers. The output of these, plus some of the raw input lines

View File

@ -29,11 +29,9 @@ struct ADS7846State {
int cycle; int cycle;
int output; int output;
}; };
typedef struct ADS7846State ADS7846State;
#define TYPE_ADS7846 "ads7846" #define TYPE_ADS7846 "ads7846"
DECLARE_INSTANCE_CHECKER(ADS7846State, ADS7846, OBJECT_DECLARE_SIMPLE_TYPE(ADS7846State, ADS7846)
TYPE_ADS7846)
/* Control-byte bitfields */ /* Control-byte bitfields */
#define CB_PD0 (1 << 0) #define CB_PD0 (1 << 0)

View File

@ -25,9 +25,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_ARTIST "artist" #define TYPE_ARTIST "artist"
typedef struct ARTISTState ARTISTState; OBJECT_DECLARE_SIMPLE_TYPE(ARTISTState, ARTIST)
DECLARE_INSTANCE_CHECKER(ARTISTState, ARTIST,
TYPE_ARTIST)
#ifdef HOST_WORDS_BIGENDIAN #ifdef HOST_WORDS_BIGENDIAN
#define ROP8OFF(_i) (3 - (_i)) #define ROP8OFF(_i) (3 - (_i))

View File

@ -30,9 +30,7 @@
#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
#define TYPE_ATI_VGA "ati-vga" #define TYPE_ATI_VGA "ati-vga"
typedef struct ATIVGAState ATIVGAState; OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState, ATI_VGA)
DECLARE_INSTANCE_CHECKER(ATIVGAState, ATI_VGA,
TYPE_ATI_VGA)
typedef struct ATIVGARegs { typedef struct ATIVGARegs {
uint32_t mm_index; uint32_t mm_index;

View File

@ -55,11 +55,9 @@ struct BochsDisplayState {
/* device state */ /* device state */
BochsDisplayMode mode; BochsDisplayMode mode;
}; };
typedef struct BochsDisplayState BochsDisplayState;
#define TYPE_BOCHS_DISPLAY "bochs-display" #define TYPE_BOCHS_DISPLAY "bochs-display"
DECLARE_INSTANCE_CHECKER(BochsDisplayState, BOCHS_DISPLAY, OBJECT_DECLARE_SIMPLE_TYPE(BochsDisplayState, BOCHS_DISPLAY)
TYPE_BOCHS_DISPLAY)
static const VMStateDescription vmstate_bochs_display = { static const VMStateDescription vmstate_bochs_display = {
.name = "bochs-display", .name = "bochs-display",

View File

@ -66,9 +66,7 @@
#define CG3_VRAM_OFFSET 0x800000 #define CG3_VRAM_OFFSET 0x800000
#define TYPE_CG3 "cgthree" #define TYPE_CG3 "cgthree"
typedef struct CG3State CG3State; OBJECT_DECLARE_SIMPLE_TYPE(CG3State, CG3)
DECLARE_INSTANCE_CHECKER(CG3State, CG3,
TYPE_CG3)
struct CG3State { struct CG3State {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -183,11 +183,9 @@ struct PCICirrusVGAState {
PCIDevice dev; PCIDevice dev;
CirrusVGAState cirrus_vga; CirrusVGAState cirrus_vga;
}; };
typedef struct PCICirrusVGAState PCICirrusVGAState;
#define TYPE_PCI_CIRRUS_VGA "cirrus-vga" #define TYPE_PCI_CIRRUS_VGA "cirrus-vga"
DECLARE_INSTANCE_CHECKER(PCICirrusVGAState, PCI_CIRRUS_VGA, OBJECT_DECLARE_SIMPLE_TYPE(PCICirrusVGAState, PCI_CIRRUS_VGA)
TYPE_PCI_CIRRUS_VGA)
static uint8_t rop_to_index[256]; static uint8_t rop_to_index[256];

View File

@ -33,9 +33,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga" #define TYPE_ISA_CIRRUS_VGA "isa-cirrus-vga"
typedef struct ISACirrusVGAState ISACirrusVGAState; OBJECT_DECLARE_SIMPLE_TYPE(ISACirrusVGAState, ISA_CIRRUS_VGA)
DECLARE_INSTANCE_CHECKER(ISACirrusVGAState, ISA_CIRRUS_VGA,
TYPE_ISA_CIRRUS_VGA)
struct ISACirrusVGAState { struct ISACirrusVGAState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -294,9 +294,7 @@ struct Exynos4210fimdWindow {
}; };
#define TYPE_EXYNOS4210_FIMD "exynos4210.fimd" #define TYPE_EXYNOS4210_FIMD "exynos4210.fimd"
typedef struct Exynos4210fimdState Exynos4210fimdState; OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210fimdState, EXYNOS4210_FIMD)
DECLARE_INSTANCE_CHECKER(Exynos4210fimdState, EXYNOS4210_FIMD,
TYPE_EXYNOS4210_FIMD)
struct Exynos4210fimdState { struct Exynos4210fimdState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -487,9 +487,7 @@ static void g364fb_init(DeviceState *dev, G364State *s)
} }
#define TYPE_G364 "sysbus-g364" #define TYPE_G364 "sysbus-g364"
typedef struct G364SysBusState G364SysBusState; OBJECT_DECLARE_SIMPLE_TYPE(G364SysBusState, G364)
DECLARE_INSTANCE_CHECKER(G364SysBusState, G364,
TYPE_G364)
struct G364SysBusState { struct G364SysBusState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -36,9 +36,7 @@ typedef enum {
} screen_state_t; } screen_state_t;
#define TYPE_JAZZ_LED "jazz-led" #define TYPE_JAZZ_LED "jazz-led"
typedef struct LedState LedState; OBJECT_DECLARE_SIMPLE_TYPE(LedState, JAZZ_LED)
DECLARE_INSTANCE_CHECKER(LedState, JAZZ_LED,
TYPE_JAZZ_LED)
struct LedState { struct LedState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -83,9 +83,7 @@ struct vertex {
} QEMU_PACKED; } QEMU_PACKED;
#define TYPE_MILKYMIST_TMU2 "milkymist-tmu2" #define TYPE_MILKYMIST_TMU2 "milkymist-tmu2"
typedef struct MilkymistTMU2State MilkymistTMU2State; OBJECT_DECLARE_SIMPLE_TYPE(MilkymistTMU2State, MILKYMIST_TMU2)
DECLARE_INSTANCE_CHECKER(MilkymistTMU2State, MILKYMIST_TMU2,
TYPE_MILKYMIST_TMU2)
struct MilkymistTMU2State { struct MilkymistTMU2State {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -69,9 +69,7 @@ enum {
}; };
#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb" #define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
typedef struct MilkymistVgafbState MilkymistVgafbState; OBJECT_DECLARE_SIMPLE_TYPE(MilkymistVgafbState, MILKYMIST_VGAFB)
DECLARE_INSTANCE_CHECKER(MilkymistVgafbState, MILKYMIST_VGAFB,
TYPE_MILKYMIST_VGAFB)
struct MilkymistVgafbState { struct MilkymistVgafbState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -32,9 +32,7 @@
#include "hw/m68k/next-cube.h" #include "hw/m68k/next-cube.h"
#include "qom/object.h" #include "qom/object.h"
typedef struct NeXTFbState NeXTFbState; OBJECT_DECLARE_SIMPLE_TYPE(NeXTFbState, NEXTFB)
DECLARE_INSTANCE_CHECKER(NeXTFbState, NEXTFB,
TYPE_NEXTFB)
struct NeXTFbState { struct NeXTFbState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -49,9 +49,7 @@ enum pl110_version
}; };
#define TYPE_PL110 "pl110" #define TYPE_PL110 "pl110"
typedef struct PL110State PL110State; OBJECT_DECLARE_SIMPLE_TYPE(PL110State, PL110)
DECLARE_INSTANCE_CHECKER(PL110State, PL110,
TYPE_PL110)
struct PL110State { struct PL110State {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -128,11 +128,9 @@ struct PCIQXLDevice {
QXLRect dirty[QXL_NUM_DIRTY_RECTS]; QXLRect dirty[QXL_NUM_DIRTY_RECTS];
QEMUBH *update_area_bh; QEMUBH *update_area_bh;
}; };
typedef struct PCIQXLDevice PCIQXLDevice;
#define TYPE_PCI_QXL "pci-qxl" #define TYPE_PCI_QXL "pci-qxl"
DECLARE_INSTANCE_CHECKER(PCIQXLDevice, PCI_QXL, OBJECT_DECLARE_SIMPLE_TYPE(PCIQXLDevice, PCI_QXL)
TYPE_PCI_QXL)
#define PANIC_ON(x) if ((x)) { \ #define PANIC_ON(x) if ((x)) { \
printf("%s: PANIC %s failed\n", __func__, #x); \ printf("%s: PANIC %s failed\n", __func__, #x); \

View File

@ -36,9 +36,7 @@
#define SII9022_INT_STATUS_PLUGGED 0x04; #define SII9022_INT_STATUS_PLUGGED 0x04;
#define TYPE_SII9022 "sii9022" #define TYPE_SII9022 "sii9022"
typedef struct sii9022_state sii9022_state; OBJECT_DECLARE_SIMPLE_TYPE(sii9022_state, SII9022)
DECLARE_INSTANCE_CHECKER(sii9022_state, SII9022,
TYPE_SII9022)
struct sii9022_state { struct sii9022_state {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -1932,9 +1932,7 @@ static const VMStateDescription vmstate_sm501_state = {
}; };
#define TYPE_SYSBUS_SM501 "sysbus-sm501" #define TYPE_SYSBUS_SM501 "sysbus-sm501"
typedef struct SM501SysBusState SM501SysBusState; OBJECT_DECLARE_SIMPLE_TYPE(SM501SysBusState, SYSBUS_SM501)
DECLARE_INSTANCE_CHECKER(SM501SysBusState, SYSBUS_SM501,
TYPE_SYSBUS_SM501)
struct SM501SysBusState { struct SM501SysBusState {
/*< private >*/ /*< private >*/
@ -2036,9 +2034,7 @@ static const TypeInfo sm501_sysbus_info = {
}; };
#define TYPE_PCI_SM501 "sm501" #define TYPE_PCI_SM501 "sm501"
typedef struct SM501PCIState SM501PCIState; OBJECT_DECLARE_SIMPLE_TYPE(SM501PCIState, PCI_SM501)
DECLARE_INSTANCE_CHECKER(SM501PCIState, PCI_SM501,
TYPE_PCI_SM501)
struct SM501PCIState { struct SM501PCIState {
/*< private >*/ /*< private >*/

View File

@ -47,9 +47,7 @@ enum ssd0303_cmd {
}; };
#define TYPE_SSD0303 "ssd0303" #define TYPE_SSD0303 "ssd0303"
typedef struct ssd0303_state ssd0303_state; OBJECT_DECLARE_SIMPLE_TYPE(ssd0303_state, SSD0303)
DECLARE_INSTANCE_CHECKER(ssd0303_state, SSD0303,
TYPE_SSD0303)
struct ssd0303_state { struct ssd0303_state {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -66,11 +66,9 @@ struct ssd0323_state {
uint32_t mode; uint32_t mode;
uint8_t framebuffer[128 * 80 / 2]; uint8_t framebuffer[128 * 80 / 2];
}; };
typedef struct ssd0323_state ssd0323_state;
#define TYPE_SSD0323 "ssd0323" #define TYPE_SSD0323 "ssd0323"
DECLARE_INSTANCE_CHECKER(ssd0323_state, SSD0323, OBJECT_DECLARE_SIMPLE_TYPE(ssd0323_state, SSD0323)
TYPE_SSD0323)
static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data) static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)

View File

@ -56,9 +56,7 @@
#define TCX_THC_CURSBITS 0x980 #define TCX_THC_CURSBITS 0x980
#define TYPE_TCX "SUNW,tcx" #define TYPE_TCX "SUNW,tcx"
typedef struct TCXState TCXState; OBJECT_DECLARE_SIMPLE_TYPE(TCXState, TCX)
DECLARE_INSTANCE_CHECKER(TCXState, TCX,
TYPE_TCX)
struct TCXState { struct TCXState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -35,9 +35,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_ISA_VGA "isa-vga" #define TYPE_ISA_VGA "isa-vga"
typedef struct ISAVGAState ISAVGAState; OBJECT_DECLARE_SIMPLE_TYPE(ISAVGAState, ISA_VGA)
DECLARE_INSTANCE_CHECKER(ISAVGAState, ISA_VGA,
TYPE_ISA_VGA)
struct ISAVGAState { struct ISAVGAState {
ISADevice parent_obj; ISADevice parent_obj;

View File

@ -51,11 +51,9 @@ struct PCIVGAState {
MemoryRegion mrs[4]; MemoryRegion mrs[4];
uint8_t edid[256]; uint8_t edid[256];
}; };
typedef struct PCIVGAState PCIVGAState;
#define TYPE_PCI_VGA "pci-vga" #define TYPE_PCI_VGA "pci-vga"
DECLARE_INSTANCE_CHECKER(PCIVGAState, PCI_VGA, OBJECT_DECLARE_SIMPLE_TYPE(PCIVGAState, PCI_VGA)
TYPE_PCI_VGA)
static const VMStateDescription vmstate_vga_pci = { static const VMStateDescription vmstate_vga_pci = {
.name = "vga", .name = "vga",

View File

@ -32,9 +32,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_I82374 "i82374" #define TYPE_I82374 "i82374"
typedef struct I82374State I82374State; OBJECT_DECLARE_SIMPLE_TYPE(I82374State, I82374)
DECLARE_INSTANCE_CHECKER(I82374State, I82374,
TYPE_I82374)
//#define DEBUG_I82374 //#define DEBUG_I82374

View File

@ -272,8 +272,7 @@ struct PL330State {
}; };
#define TYPE_PL330 "pl330" #define TYPE_PL330 "pl330"
DECLARE_INSTANCE_CHECKER(PL330State, PL330, OBJECT_DECLARE_SIMPLE_TYPE(PL330State, PL330)
TYPE_PL330)
static const VMStateDescription vmstate_pl330 = { static const VMStateDescription vmstate_pl330 = {
.name = "pl330", .name = "pl330",

View File

@ -23,9 +23,7 @@
#define PUV3_DMA_CH(offset) ((offset) >> 8) #define PUV3_DMA_CH(offset) ((offset) >> 8)
#define TYPE_PUV3_DMA "puv3_dma" #define TYPE_PUV3_DMA "puv3_dma"
typedef struct PUV3DMAState PUV3DMAState; OBJECT_DECLARE_SIMPLE_TYPE(PUV3DMAState, PUV3_DMA)
DECLARE_INSTANCE_CHECKER(PUV3DMAState, PUV3_DMA,
TYPE_PUV3_DMA)
struct PUV3DMAState { struct PUV3DMAState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -35,9 +35,7 @@ typedef struct {
} PXA2xxDMAChannel; } PXA2xxDMAChannel;
#define TYPE_PXA2XX_DMA "pxa2xx-dma" #define TYPE_PXA2XX_DMA "pxa2xx-dma"
typedef struct PXA2xxDMAState PXA2xxDMAState; OBJECT_DECLARE_SIMPLE_TYPE(PXA2xxDMAState, PXA2XX_DMA)
DECLARE_INSTANCE_CHECKER(PXA2xxDMAState, PXA2XX_DMA,
TYPE_PXA2XX_DMA)
struct PXA2xxDMAState { struct PXA2xxDMAState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -56,9 +56,7 @@ typedef struct dma_pagetable_entry {
#define DMA_FLAG_ADDR_INTR 0x0400 #define DMA_FLAG_ADDR_INTR 0x0400
#define TYPE_RC4030 "rc4030" #define TYPE_RC4030 "rc4030"
typedef struct rc4030State rc4030State; OBJECT_DECLARE_SIMPLE_TYPE(rc4030State, RC4030)
DECLARE_INSTANCE_CHECKER(rc4030State, RC4030,
TYPE_RC4030)
#define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region" #define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region"

View File

@ -43,9 +43,7 @@
#define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream" #define TYPE_XILINX_AXI_DMA_DATA_STREAM "xilinx-axi-dma-data-stream"
#define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream" #define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream"
typedef struct XilinxAXIDMA XilinxAXIDMA; OBJECT_DECLARE_SIMPLE_TYPE(XilinxAXIDMA, XILINX_AXI_DMA)
DECLARE_INSTANCE_CHECKER(XilinxAXIDMA, XILINX_AXI_DMA,
TYPE_XILINX_AXI_DMA)
typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave; typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave;
DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM, DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM,

View File

@ -31,9 +31,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_GPIOKEY "gpio-key" #define TYPE_GPIOKEY "gpio-key"
typedef struct GPIOKEYState GPIOKEYState; OBJECT_DECLARE_SIMPLE_TYPE(GPIOKEYState, GPIOKEY)
DECLARE_INSTANCE_CHECKER(GPIOKEYState, GPIOKEY,
TYPE_GPIOKEY)
#define GPIO_KEY_LATENCY 100 /* 100ms */ #define GPIO_KEY_LATENCY 100 /* 100ms */
struct GPIOKEYState { struct GPIOKEYState {

View File

@ -18,9 +18,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_MAX7310 "max7310" #define TYPE_MAX7310 "max7310"
typedef struct MAX7310State MAX7310State; OBJECT_DECLARE_SIMPLE_TYPE(MAX7310State, MAX7310)
DECLARE_INSTANCE_CHECKER(MAX7310State, MAX7310,
TYPE_MAX7310)
struct MAX7310State { struct MAX7310State {
I2CSlave parent_obj; I2CSlave parent_obj;

View File

@ -27,9 +27,7 @@
#include "qom/object.h" #include "qom/object.h"
#define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio" #define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio"
typedef struct MPC8XXXGPIOState MPC8XXXGPIOState; OBJECT_DECLARE_SIMPLE_TYPE(MPC8XXXGPIOState, MPC8XXX_GPIO)
DECLARE_INSTANCE_CHECKER(MPC8XXXGPIOState, MPC8XXX_GPIO,
TYPE_MPC8XXX_GPIO)
struct MPC8XXXGPIOState { struct MPC8XXXGPIOState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -35,9 +35,7 @@ static const uint8_t pl061_id_luminary[12] =
{ 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
#define TYPE_PL061 "pl061" #define TYPE_PL061 "pl061"
typedef struct PL061State PL061State; OBJECT_DECLARE_SIMPLE_TYPE(PL061State, PL061)
DECLARE_INSTANCE_CHECKER(PL061State, PL061,
TYPE_PL061)
#define N_GPIOS 8 #define N_GPIOS 8

View File

@ -19,9 +19,7 @@
#include "qemu/log.h" #include "qemu/log.h"
#define TYPE_PUV3_GPIO "puv3_gpio" #define TYPE_PUV3_GPIO "puv3_gpio"
typedef struct PUV3GPIOState PUV3GPIOState; OBJECT_DECLARE_SIMPLE_TYPE(PUV3GPIOState, PUV3_GPIO)
DECLARE_INSTANCE_CHECKER(PUV3GPIOState, PUV3_GPIO,
TYPE_PUV3_GPIO)
struct PUV3GPIOState { struct PUV3GPIOState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -28,9 +28,7 @@
/* SCOOP devices */ /* SCOOP devices */
#define TYPE_SCOOP "scoop" #define TYPE_SCOOP "scoop"
typedef struct ScoopInfo ScoopInfo; OBJECT_DECLARE_SIMPLE_TYPE(ScoopInfo, SCOOP)
DECLARE_INSTANCE_CHECKER(ScoopInfo, SCOOP,
TYPE_SCOOP)
struct ScoopInfo { struct ScoopInfo {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -81,9 +81,7 @@
#define DINO_MEM_CHUNK_SIZE (8 * MiB) #define DINO_MEM_CHUNK_SIZE (8 * MiB)
typedef struct DinoState DinoState; OBJECT_DECLARE_SIMPLE_TYPE(DinoState, DINO_PCI_HOST_BRIDGE)
DECLARE_INSTANCE_CHECKER(DinoState, DINO_PCI_HOST_BRIDGE,
TYPE_DINO_PCI_HOST_BRIDGE)
#define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4) #define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4)
static const uint32_t reg800_keep_bits[DINO800_REGS] = { static const uint32_t reg800_keep_bits[DINO800_REGS] = {

View File

@ -53,9 +53,7 @@
#define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */
#define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */
typedef struct LasiState LasiState; OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP)
DECLARE_INSTANCE_CHECKER(LasiState, LASI_CHIP,
TYPE_LASI_CHIP)
struct LasiState { struct LasiState {
PCIHostState parent_obj; PCIHostState parent_obj;

View File

@ -35,11 +35,9 @@ struct SynICState {
struct hyperv_message_page *msg_page; struct hyperv_message_page *msg_page;
struct hyperv_event_flags_page *event_page; struct hyperv_event_flags_page *event_page;
}; };
typedef struct SynICState SynICState;
#define TYPE_SYNIC "hyperv-synic" #define TYPE_SYNIC "hyperv-synic"
DECLARE_INSTANCE_CHECKER(SynICState, SYNIC, OBJECT_DECLARE_SIMPLE_TYPE(SynICState, SYNIC)
TYPE_SYNIC)
static bool synic_enabled; static bool synic_enabled;

View File

@ -47,11 +47,9 @@ struct HypervTestDev {
QLIST_HEAD(, TestMsgConn) msg_conns; QLIST_HEAD(, TestMsgConn) msg_conns;
QLIST_HEAD(, TestEvtConn) evt_conns; QLIST_HEAD(, TestEvtConn) evt_conns;
}; };
typedef struct HypervTestDev HypervTestDev;
#define TYPE_HYPERV_TEST_DEV "hyperv-testdev" #define TYPE_HYPERV_TEST_DEV "hyperv-testdev"
DECLARE_INSTANCE_CHECKER(HypervTestDev, HYPERV_TEST_DEV, OBJECT_DECLARE_SIMPLE_TYPE(HypervTestDev, HYPERV_TEST_DEV)
TYPE_HYPERV_TEST_DEV)
enum { enum {
HV_TEST_DEV_SINT_ROUTE_CREATE = 1, HV_TEST_DEV_SINT_ROUTE_CREATE = 1,

View File

@ -163,9 +163,7 @@ void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus)
/* GPIO interface. */ /* GPIO interface. */
#define TYPE_GPIO_I2C "gpio_i2c" #define TYPE_GPIO_I2C "gpio_i2c"
typedef struct GPIOI2CState GPIOI2CState; OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C)
DECLARE_INSTANCE_CHECKER(GPIOI2CState, GPIO_I2C,
TYPE_GPIO_I2C)
struct GPIOI2CState { struct GPIOI2CState {
SysBusDevice parent_obj; SysBusDevice parent_obj;

View File

@ -34,9 +34,7 @@
#endif #endif
#define TYPE_EXYNOS4_I2C "exynos4210.i2c" #define TYPE_EXYNOS4_I2C "exynos4210.i2c"
typedef struct Exynos4210I2CState Exynos4210I2CState; OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210I2CState, EXYNOS4_I2C)
DECLARE_INSTANCE_CHECKER(Exynos4210I2CState, EXYNOS4_I2C,
TYPE_EXYNOS4_I2C)
/* Exynos4210 I2C memory map */ /* Exynos4210 I2C memory map */
#define EXYNOS4_I2C_MEM_SIZE 0x14 #define EXYNOS4_I2C_MEM_SIZE 0x14

View File

@ -37,9 +37,7 @@
#endif #endif
#define TYPE_MPC_I2C "mpc-i2c" #define TYPE_MPC_I2C "mpc-i2c"
typedef struct MPCI2CState MPCI2CState; OBJECT_DECLARE_SIMPLE_TYPE(MPCI2CState, MPC_I2C)
DECLARE_INSTANCE_CHECKER(MPCI2CState, MPC_I2C,
TYPE_MPC_I2C)
#define MPC_I2C_ADR 0x00 #define MPC_I2C_ADR 0x00
#define MPC_I2C_FDR 0x04 #define MPC_I2C_FDR 0x04

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