target: e2k: add cpu definitions
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TARGET_ARCH=e2k
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TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL=syscall_64.tbl
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98
linux-user/e2k/signal.c
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98
linux-user/e2k/signal.c
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/*
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* Emulation of Linux signals
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*
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* Copyright (c) 2003 Fabrice Bellard
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* Copyright (c) 2020 Alibek Omarov
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "user-internals.h"
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#include "signal-common.h"
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#include "linux-user/trace.h"
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#define MAX_TC_SIZE 10
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#define TIR_NUM 19
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#define DAM_ENTRIES_NUM 32
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#define SBBP_ENTRIES_NUM 32
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/* from user.h !!! */
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#define MLT_NUM (16 * 3) /* common for E3M and E3S */
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struct target_sigcontext {
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abi_ulong cr0_lo;
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abi_ulong cr0_hi;
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abi_ulong cr1_lo;
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abi_ulong cr1_hi;
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abi_ulong sbr; /* 21 Stack base register: top of */
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/* local data (user) stack */
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abi_ulong usd_lo; /* 22 Local data (user) stack */
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abi_ulong usd_hi; /* 23 descriptor: base & size */
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abi_ulong psp_lo; /* 24 Procedure stack pointer: */
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abi_ulong psp_hi; /* 25 base & index & size */
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abi_ulong pcsp_lo; /* 26 Procedure chain stack */
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abi_ulong pcsp_hi; /* 27 pointer: base & index & size */
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/*
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* additional part (for binary compiler)
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*/
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uint8_t bincomp_padding[sizeof(abi_ulong)*184 + 10];
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#if 0
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abi_ulong rpr_hi;
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abi_ulong rpr_lo;
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abi_ulong nr_TIRs;
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abi_ulong tir_lo[TIR_NUM];
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abi_ulong tir_hi[TIR_NUM];
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abi_ulong trap_cell_addr[MAX_TC_SIZE];
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abi_ulong trap_cell_val[MAX_TC_SIZE];
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uint8_t trap_cell_tag[MAX_TC_SIZE];
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abi_ulong trap_cell_info[MAX_TC_SIZE];
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abi_ulong dam[DAM_ENTRIES_NUM];
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abi_ulong sbbp[SBBP_ENTRIES_NUM];
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abi_ulong mlt[MLT_NUM];
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abi_ulong upsr;
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#endif
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};
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#define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7)))
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void setup_frame(int sig, struct target_sigaction *ka,
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target_sigset_t *set, CPUE2KState *env)
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{
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}
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void setup_rt_frame(int sig, struct target_sigaction *ka,
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target_siginfo_t *info,
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target_sigset_t *set, CPUE2KState *env)
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{
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qemu_log_mask(LOG_UNIMP, "setup_rt_frame: not implemented\n");
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}
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long do_sigreturn(CPUE2KState *env)
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{
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}
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long do_rt_sigreturn(CPUE2KState *env)
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{
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trace_user_do_rt_sigreturn(env, 0);
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qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n");
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return -TARGET_ENOSYS;
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}
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typedef uint64_t e2k_greg_t; // double word
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struct target_pt_regs {
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/* special registers */
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uint64_t wd; // Current window descriptor (WD)
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47
target/e2k/cpu-qom.h
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47
target/e2k/cpu-qom.h
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/*
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* QEMU E2K CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_E2K_CPU_QOM_H
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#define QEMU_E2K_CPU_QOM_H
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#include "hw/core/cpu.h"
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#include "qom/object.h"
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#define TYPE_E2K_CPU "e2k-cpu"
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OBJECT_DECLARE_CPU_TYPE(E2KCPU, E2KCPUClass, E2K_CPU)
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/**
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* E2KCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* A E2K CPU model.
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*/
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struct E2KCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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};
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#endif
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44
target/e2k/cpu.h
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target/e2k/cpu.h
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#ifndef E2K_CPU_H
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#define E2K_CPU_H
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#include "qemu/bswap.h"
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#include "cpu-qom.h"
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#include "exec/cpu-defs.h"
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struct CPUE2KState {
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/* register file */
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uint64_t gregs[32]; /* general registers */
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uint64_t pregs[224]; /* procedure regs, access through wreg */
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/* control registers */
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uint64_t ctpr1; // Control Transfer Preparation Register (CTPR)
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uint64_t ctpr2;
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uint64_t ctpr3;
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/* special registers */
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uint64_t *wreg; /* pointer to current window */
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uint32_t br; /* base register offset, max 128 */
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uint64_t ip, nip; /* instruction address, next instruction address */
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uint32_t pfpfr; // Packed Floating Point Flag Register (PFPFR)
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uint32_t fpcr; // Floating point control register (FPCR)
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uint32_t fpsr; // Floating point state register (FPSR)
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};
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/**
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* E2KCPU:
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* @env: #CPUE2KState
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*
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* An Elbrus CPU.
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*/
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struct E2KCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUNegativeOffsetState neg;
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CPUE2KState env;
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};
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#endif
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