OpenE2K/qemu-e2k
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pci: Convert uses of pci_create() etc. with Coccinelle

Browse Source 
Replace

    dev = pci_create(bus, type_name);
    ...
    qdev_init_nofail(dev);

by

    dev = pci_new(type_name);
    ...
    pci_realize_and_unref(dev, bus, &error_fatal);

and similarly for pci_create_multifunction().

Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains
why.

Coccinelle script:

    @@
    expression dev, bus, expr;
    expression list args;
    @@
    -    dev = pci_create(bus, args);
    +    dev = pci_new(args);
         ... when != dev = expr
    -    qdev_init_nofail(&dev->qdev);
    +    pci_realize_and_unref(dev, bus, &error_fatal);

    @@
    expression dev, bus, expr;
    expression list args;
    expression d;
    @@
    -    dev = pci_create(bus, args);
    +    dev = pci_new(args);
    (
         d = &dev->qdev;
    |
         d = DEVICE(dev);
    )
         ... when != dev = expr
    -    qdev_init_nofail(d);
    +    pci_realize_and_unref(dev, bus, &error_fatal);

    @@
    expression dev, bus, expr;
    expression list args;
    @@
    -    dev = pci_create(bus, args);
    +    dev = pci_new(args);
         ... when != dev = expr
    -    qdev_init_nofail(DEVICE(dev));
    +    pci_realize_and_unref(dev, bus, &error_fatal);

    @@
    expression dev, bus, expr;
    expression list args;
    @@
    -    dev = DEVICE(pci_create(bus, args));
    +    PCIDevice *pci_dev; // TODO move
    +    pci_dev = pci_new(args);
    +    dev = DEVICE(pci_dev);
         ... when != dev = expr
    -    qdev_init_nofail(dev);
    +    pci_realize_and_unref(pci_dev, bus, &error_fatal);

    @@
    expression dev, bus, expr;
    expression list args;
    @@
    -    dev = pci_create_multifunction(bus, args);
    +    dev = pci_new_multifunction(args);
         ... when != dev = expr
    -    qdev_init_nofail(&dev->qdev);
    +    pci_realize_and_unref(dev, bus, &error_fatal);

    @@
    expression bus, expr;
    expression list args;
    identifier dev;
    @@
    -    PCIDevice *dev = pci_create_multifunction(bus, args);
    +    PCIDevice *dev = pci_new_multifunction(args);
         ... when != dev = expr
    -    qdev_init_nofail(&dev->qdev);
    +    pci_realize_and_unref(dev, bus, &error_fatal);

    @@
    expression dev, bus, expr;
    expression list args;
    @@
    -    dev = pci_create_multifunction(bus, args);
    +    dev = pci_new_multifunction(args);
         ... when != dev = expr
    -    qdev_init_nofail(DEVICE(dev));
    +    pci_realize_and_unref(dev, bus, &error_fatal);

Missing #include "qapi/error.h" added manually, whitespace changes
minimized manually, @pci_dev declarations moved manually.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-16-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Markus Armbruster 2020-06-10 07:32:04 +02:00
parent 7d61226158
commit 9307d06da9
11 changed files with 44 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hw/acpi/piix4.c
View File

@ -514,10 +514,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq, qemu_irq sci_irq, qemu_irq smi_irq,
int smm_enabled, DeviceState **piix4_pm) int smm_enabled, DeviceState **piix4_pm)
{ {
PCIDevice *pci_dev;
DeviceState *dev; DeviceState *dev;
PIIX4PMState *s; PIIX4PMState *s;
dev = DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM)); pci_dev = pci_new(devfn, TYPE_PIIX4_PM);
dev = DEVICE(pci_dev);
qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base); qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base);
if (piix4_pm) { if (piix4_pm) {
*piix4_pm = dev; *piix4_pm = dev;
@ -531,7 +533,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
s->use_acpi_pci_hotplug = false; s->use_acpi_pci_hotplug = false;
} }
qdev_init_nofail(dev); pci_realize_and_unref(pci_dev, bus, &error_fatal);
return s->smb.smbus; return s->smb.smbus;
} }

10
hw/i386/pc_q35.c
View File

@ -100,16 +100,16 @@ static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
return -1; return -1;
} }
ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), true, name);
qdev_init_nofail(&ehci->qdev); pci_realize_and_unref(ehci, bus, &error_fatal);
usbbus = QLIST_FIRST(&ehci->qdev.child_bus); usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true,
true, comp[i].name); comp[i].name);
qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
qdev_init_nofail(&uhci->qdev); pci_realize_and_unref(uhci, bus, &error_fatal);
} }
return 0; return 0;
} }

13
hw/isa/vt82c686.c
View File

@ -23,6 +23,7 @@
#include "hw/isa/apm.h" #include "hw/isa/apm.h"
#include "hw/acpi/acpi.h" #include "hw/acpi/acpi.h"
#include "hw/i2c/pm_smbus.h" #include "hw/i2c/pm_smbus.h"
#include "qapi/error.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "qemu/timer.h" #include "qemu/timer.h"
#include "exec/address-spaces.h" #include "exec/address-spaces.h"
@ -276,8 +277,8 @@ void vt82c686b_ac97_init(PCIBus *bus, int devfn)
{ {
PCIDevice *dev; PCIDevice *dev;
dev = pci_create(bus, devfn, TYPE_VT82C686B_AC97_DEVICE); dev = pci_new(devfn, TYPE_VT82C686B_AC97_DEVICE);
qdev_init_nofail(&dev->qdev); pci_realize_and_unref(dev, bus, &error_fatal);
} }
static void via_ac97_class_init(ObjectClass *klass, void *data) static void via_ac97_class_init(ObjectClass *klass, void *data)
@ -320,8 +321,8 @@ void vt82c686b_mc97_init(PCIBus *bus, int devfn)
{ {
PCIDevice *dev; PCIDevice *dev;
dev = pci_create(bus, devfn, TYPE_VT82C686B_MC97_DEVICE); dev = pci_new(devfn, TYPE_VT82C686B_MC97_DEVICE);
qdev_init_nofail(&dev->qdev); pci_realize_and_unref(dev, bus, &error_fatal);
} }
static void via_mc97_class_init(ObjectClass *klass, void *data) static void via_mc97_class_init(ObjectClass *klass, void *data)
@ -388,12 +389,12 @@ I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
PCIDevice *dev; PCIDevice *dev;
VT686PMState *s; VT686PMState *s;
dev = pci_create(bus, devfn, TYPE_VT82C686B_PM_DEVICE); dev = pci_new(devfn, TYPE_VT82C686B_PM_DEVICE);
qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base); qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
s = VT82C686B_PM_DEVICE(dev); s = VT82C686B_PM_DEVICE(dev);
qdev_init_nofail(&dev->qdev); pci_realize_and_unref(dev, bus, &error_fatal);
return s->smb.smbus; return s->smb.smbus;
} }

6
hw/mips/fuloong2e.c
View File

@ -297,6 +297,7 @@ static void mips_fuloong2e_init(MachineState *machine)
long bios_size; long bios_size;
uint8_t *spd_data; uint8_t *spd_data;
int64_t kernel_entry; int64_t kernel_entry;
PCIDevice *pci_dev;
PCIBus *pci_bus; PCIBus *pci_bus;
ISABus *isa_bus; ISABus *isa_bus;
I2CBus *smbus; I2CBus *smbus;
@ -367,10 +368,11 @@ static void mips_fuloong2e_init(MachineState *machine)
/* GPU */ /* GPU */
if (vga_interface_type != VGA_NONE) { if (vga_interface_type != VGA_NONE) {
dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); pci_dev = pci_new(-1, "ati-vga");
dev = DEVICE(pci_dev);
qdev_prop_set_uint32(dev, "vgamem_mb", 16); qdev_prop_set_uint32(dev, "vgamem_mb", 16);
qdev_prop_set_uint16(dev, "x-device-id", 0x5159); qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
qdev_init_nofail(dev); pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
} }
/* Populate SPD eeprom data */ /* Populate SPD eeprom data */

6
hw/pci-bridge/dec.c
View File

@ -26,6 +26,7 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "dec.h" #include "dec.h"
#include "hw/sysbus.h" #include "hw/sysbus.h"
#include "qapi/error.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "hw/pci/pci.h" #include "hw/pci/pci.h"
#include "hw/pci/pci_host.h" #include "hw/pci/pci_host.h"
@ -81,11 +82,10 @@ PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
PCIDevice *dev; PCIDevice *dev;
PCIBridge *br; PCIBridge *br;
dev = pci_create_multifunction(parent_bus, devfn, false, dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
"dec-21154-p2p-bridge");
br = PCI_BRIDGE(dev); br = PCI_BRIDGE(dev);
pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq); pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
qdev_init_nofail(&dev->qdev); pci_realize_and_unref(dev, parent_bus, &error_fatal);
return pci_bridge_get_sec_bus(br); return pci_bridge_get_sec_bus(br);
} }

4
hw/pci-host/bonito.c
View File

@ -750,11 +750,11 @@ PCIBus *bonito_init(qemu_irq *pic)
pcihost->pic = pic; pcihost->pic = pic;
qdev_realize_and_unref(dev, NULL, &error_fatal); qdev_realize_and_unref(dev, NULL, &error_fatal);
d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); d = pci_new(PCI_DEVFN(0, 0), TYPE_PCI_BONITO);
s = PCI_BONITO(d); s = PCI_BONITO(d);
s->pcihost = pcihost; s->pcihost = pcihost;
pcihost->pci_dev = s; pcihost->pci_dev = s;
qdev_init_nofail(DEVICE(d)); pci_realize_and_unref(d, phb->bus, &error_fatal);
return phb->bus; return phb->bus;
} }

13
hw/pci-host/sabre.c
View File

@ -35,6 +35,7 @@
#include "hw/pci-bridge/simba.h" #include "hw/pci-bridge/simba.h"
#include "hw/pci-host/sabre.h" #include "hw/pci-host/sabre.h"
#include "exec/address-spaces.h" #include "exec/address-spaces.h"
#include "qapi/error.h"
#include "qemu/log.h" #include "qemu/log.h"
#include "qemu/module.h" #include "qemu/module.h"
#include "sysemu/runstate.h" #include "sysemu/runstate.h"
@ -405,17 +406,17 @@ static void sabre_realize(DeviceState *dev, Error **errp)
pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu); pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu);
/* APB secondary busses */ /* APB secondary busses */
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true, pci_dev = pci_new_multifunction(PCI_DEVFN(1, 0), true,
TYPE_SIMBA_PCI_BRIDGE); TYPE_SIMBA_PCI_BRIDGE);
s->bridgeB = PCI_BRIDGE(pci_dev); s->bridgeB = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq); pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq);
qdev_init_nofail(&pci_dev->qdev); pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true, pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), true,
TYPE_SIMBA_PCI_BRIDGE); TYPE_SIMBA_PCI_BRIDGE);
s->bridgeA = PCI_BRIDGE(pci_dev); s->bridgeA = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq); pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq);
qdev_init_nofail(&pci_dev->qdev); pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
} }
static void sabre_init(Object *obj) static void sabre_init(Object *obj)

8
hw/pci/pci.c
View File

@ -1953,10 +1953,10 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
exit(1); exit(1);
} }
pci_dev = pci_create(bus, devfn, nd->model); pci_dev = pci_new(devfn, nd->model);
dev = &pci_dev->qdev; dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd); qdev_set_nic_properties(dev, nd);
qdev_init_nofail(dev); pci_realize_and_unref(pci_dev, bus, &error_fatal);
g_ptr_array_free(pci_nic_models, true); g_ptr_array_free(pci_nic_models, true);
return pci_dev; return pci_dev;
} }
@ -2199,8 +2199,8 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
bool multifunction, bool multifunction,
const char *name) const char *name)
{ {
PCIDevice *dev = pci_create_multifunction(bus, devfn, multifunction, name); PCIDevice *dev = pci_new_multifunction(devfn, multifunction, name);
qdev_init_nofail(&dev->qdev); pci_realize_and_unref(dev, bus, &error_fatal);
return dev; return dev;
} }

4
hw/ppc/mac_newworld.c
View File

@ -375,14 +375,14 @@ static void ppc_core99_init(MachineState *machine)
pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
/* MacIO */ /* MacIO */
macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
dev = DEVICE(macio); dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_uint64(dev, "frequency", tbfreq);
qdev_prop_set_bit(dev, "has-pmu", has_pmu); qdev_prop_set_bit(dev, "has-pmu", has_pmu);
qdev_prop_set_bit(dev, "has-adb", has_adb); qdev_prop_set_bit(dev, "has-adb", has_adb);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort); &error_abort);
qdev_init_nofail(dev); pci_realize_and_unref(macio, pci_bus, &error_fatal);
/* We only emulate 2 out of 3 IDE controllers for now */ /* We only emulate 2 out of 3 IDE controllers for now */
ide_drive_get(hd, ARRAY_SIZE(hd)); ide_drive_get(hd, ARRAY_SIZE(hd));

4
hw/ppc/mac_oldworld.c
View File

@ -278,12 +278,12 @@ static void ppc_heathrow_init(MachineState *machine)
ide_drive_get(hd, ARRAY_SIZE(hd)); ide_drive_get(hd, ARRAY_SIZE(hd));
/* MacIO */ /* MacIO */
macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); macio = pci_new(-1, TYPE_OLDWORLD_MACIO);
dev = DEVICE(macio); dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_uint64(dev, "frequency", tbfreq);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort); &error_abort);
qdev_init_nofail(dev); pci_realize_and_unref(macio, pci_bus, &error_fatal);
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[0]")); "ide[0]"));

8
hw/sparc64/sun4u.c
View File

@ -605,10 +605,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
pci_busA->slot_reserved_mask = 0xfffffff1; pci_busA->slot_reserved_mask = 0xfffffff1;
pci_busB->slot_reserved_mask = 0xfffffff0; pci_busB->slot_reserved_mask = 0xfffffff0;
ebus = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 0), true, TYPE_EBUS); ebus = pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS);
qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base", qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base",
hwdef->console_serial_base); hwdef->console_serial_base);
qdev_init_nofail(DEVICE(ebus)); pci_realize_and_unref(ebus, pci_busA, &error_fatal);
/* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */ /* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */
qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7, qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7,
@ -661,9 +661,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
qemu_macaddr_default_if_unset(&macaddr); qemu_macaddr_default_if_unset(&macaddr);
} }
pci_dev = pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide"); pci_dev = pci_new(PCI_DEVFN(3, 0), "cmd646-ide");
qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1); qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1);
qdev_init_nofail(&pci_dev->qdev); pci_realize_and_unref(pci_dev, pci_busA, &error_fatal);
pci_ide_create_devs(pci_dev); pci_ide_create_devs(pci_dev);
/* Map NVRAM into I/O (ebus) space */ /* Map NVRAM into I/O (ebus) space */