target/riscv: Sign extend link reg for jal and jalr
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220120122050.41546-4-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
b655dc7cd9
commit
a14db52f7f
|
@ -68,9 +68,7 @@ static bool trans_jalr(DisasContext *ctx, arg_jalr *a)
|
|||
tcg_temp_free(t0);
|
||||
}
|
||||
|
||||
if (a->rd != 0) {
|
||||
tcg_gen_movi_tl(cpu_gpr[a->rd], ctx->pc_succ_insn);
|
||||
}
|
||||
gen_set_gpri(ctx, a->rd, ctx->pc_succ_insn);
|
||||
tcg_gen_lookup_and_goto_ptr();
|
||||
|
||||
if (misaligned) {
|
||||
|
|
|
@ -369,10 +369,8 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
|
|||
return;
|
||||
}
|
||||
}
|
||||
if (rd != 0) {
|
||||
tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn);
|
||||
}
|
||||
|
||||
gen_set_gpri(ctx, rd, ctx->pc_succ_insn);
|
||||
gen_goto_tb(ctx, 0, ctx->base.pc_next + imm); /* must use this for safety */
|
||||
ctx->base.is_jmp = DISAS_NORETURN;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue