target/mips: Remove CPUMIPSState::saarp field
This field is never set, so remove the unreachable code. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-5-philmd@linaro.org>
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@ -516,7 +516,6 @@ static void mips_itu_init(Object *obj)
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static void mips_itu_realize(DeviceState *dev, Error **errp)
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{
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MIPSITUState *s = MIPS_ITU(dev);
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CPUMIPSState *env;
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if (s->num_fifo > ITC_FIFO_NUM_MAX) {
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error_setg(errp, "Exceed maximum number of FIFO cells: %d",
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@ -533,11 +532,6 @@ static void mips_itu_realize(DeviceState *dev, Error **errp)
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return;
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}
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env = &MIPS_CPU(s->cpu0)->env;
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if (env->saarp) {
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s->saar = env->CP0_SAAR;
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}
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s->cell = g_new(ITCStorageCell, get_num_cells(s));
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}
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@ -1174,7 +1174,6 @@ typedef struct CPUArchState {
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uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
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uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */
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uint64_t insn_flags; /* Supported instruction set */
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int saarp;
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/* Fields up to this point are cleared by a CPU reset */
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struct {} end_reset_fields;
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