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target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty

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Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-5-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Frank Chang 2021-12-10 15:55:50 +08:00 committed by Alistair Francis
parent 61b4b69d12
commit c36b2f1a4d
1 changed files with 1 additions and 0 deletions
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1
target/riscv/csr.c
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@ -502,6 +502,7 @@ static RISCVException read_mhartid(CPURISCVState *env, int csrno,
static uint64_t add_status_sd(RISCVMXL xl, uint64_t status)
{
if ((status & MSTATUS_FS) == MSTATUS_FS ||
(status & MSTATUS_VS) == MSTATUS_VS ||
(status & MSTATUS_XS) == MSTATUS_XS) {
switch (xl) {
case MXL_RV32: