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target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH

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Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by
Coverity (CID 1395627).

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
This commit is contained in:
Stefan Markovic 2018-10-16 16:41:19 +02:00 committed by Aleksandar Markovic
parent fdac60cd04
commit d5ebcbaf09
1 changed files with 1 additions and 1 deletions
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2
target/mips/translate.c
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@ -19970,8 +19970,8 @@ static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int opc,
case 0:
/* SHRA_PH */
gen_helper_shra_ph(v1_t, t0, v1_t);
break;
gen_store_gpr(v1_t, rt);
break;
case 1:
/* SHRA_R_PH */
gen_helper_shra_r_ph(v1_t, t0, v1_t);