target/cpu: Restrict do_transaction_failed() handlers to sysemu
The 'hwaddr' type is only available / meaningful on system emulation. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221216215519.5522-6-philmd@linaro.org>
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@ -611,6 +611,7 @@ G_NORETURN void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
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MMUAccessType access_type,
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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int mmu_idx, uintptr_t retaddr);
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#ifndef CONFIG_USER_ONLY
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/* arm_cpu_do_transaction_failed: handle a memory system error response
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/* arm_cpu_do_transaction_failed: handle a memory system error response
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* (eg "no device/memory present at address") by raising an external abort
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* (eg "no device/memory present at address") by raising an external abort
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* exception
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* exception
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@ -620,6 +621,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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MMUAccessType access_type,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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MemTxResult response, uintptr_t retaddr);
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#endif
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/* Call any registered EL change hooks */
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/* Call any registered EL change hooks */
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static inline void arm_call_pre_el_change_hook(ARMCPU *cpu)
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static inline void arm_call_pre_el_change_hook(ARMCPU *cpu)
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@ -581,10 +581,12 @@ static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
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bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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bool probe, uintptr_t retaddr);
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#ifndef CONFIG_USER_ONLY
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void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
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void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
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unsigned size, MMUAccessType access_type,
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unsigned size, MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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MemTxResult response, uintptr_t retaddr);
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#endif
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#include "exec/cpu-all.h"
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#include "exec/cpu-all.h"
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@ -579,11 +579,6 @@ G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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bool probe, uintptr_t retaddr);
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void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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vaddr addr, unsigned size,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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char *riscv_isa_string(RISCVCPU *cpu);
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char *riscv_isa_string(RISCVCPU *cpu);
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void riscv_cpu_list(void);
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void riscv_cpu_list(void);
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@ -591,6 +586,11 @@ void riscv_cpu_list(void);
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#define cpu_mmu_index riscv_cpu_mmu_index
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#define cpu_mmu_index riscv_cpu_mmu_index
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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vaddr addr, unsigned size,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
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bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
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void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
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void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
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