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tests/tcg/s390x: Tests for Miscellaneous-Instruction-Extensions Facility 3

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tests/tcg/s390x/mie3-compl.c: [N]*K instructions
tests/tcg/s390x/mie3-mvcrl.c: MVCRL instruction
tests/tcg/s390x/mie3-sel.c: SELECT instruction

Signed-off-by: David Miller <dmiller423@gmail.com>
Message-Id: <20220223223117.66660-4-dmiller423@gmail.com>
[thuth: Squash mnemonic -> .insn patch, white space cleanup, improve asm usage]
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
David Miller 2022-02-23 17:31:16 -05:00 committed by Thomas Huth
parent 8a4eafb69c
commit e2c3fb0699
4 changed files with 116 additions and 0 deletions
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3
tests/tcg/s390x/Makefile.target
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@ -7,6 +7,9 @@ TESTS+=ipm
TESTS+=exrl-trt
TESTS+=exrl-trtr
TESTS+=pack
TESTS+=mie3-compl
TESTS+=mie3-mvcrl
TESTS+=mie3-sel
TESTS+=mvo
TESTS+=mvc
TESTS+=shift

48
tests/tcg/s390x/mie3-compl.c Normal file
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@ -0,0 +1,48 @@
#include <stdint.h>
#define FbinOp(S, ASM) uint64_t S(uint64_t a, uint64_t b) \
{ \
uint64_t res = 0; \
asm ("llihf %[res],801\n" ASM \
: [res]"=&r"(res) : [a]"r"(a), [b]"r"(b) : "cc"); \
return res; \
}
/* AND WITH COMPLEMENT */
FbinOp(_ncrk, ".insn rrf, 0xB9F50000, %[res], %[b], %[a], 0\n")
FbinOp(_ncgrk, ".insn rrf, 0xB9E50000, %[res], %[b], %[a], 0\n")
/* NAND */
FbinOp(_nnrk, ".insn rrf, 0xB9740000, %[res], %[b], %[a], 0\n")
FbinOp(_nngrk, ".insn rrf, 0xB9640000, %[res], %[b], %[a], 0\n")
/* NOT XOR */
FbinOp(_nxrk, ".insn rrf, 0xB9770000, %[res], %[b], %[a], 0\n")
FbinOp(_nxgrk, ".insn rrf, 0xB9670000, %[res], %[b], %[a], 0\n")
/* NOR */
FbinOp(_nork, ".insn rrf, 0xB9760000, %[res], %[b], %[a], 0\n")
FbinOp(_nogrk, ".insn rrf, 0xB9660000, %[res], %[b], %[a], 0\n")
/* OR WITH COMPLEMENT */
FbinOp(_ocrk, ".insn rrf, 0xB9750000, %[res], %[b], %[a], 0\n")
FbinOp(_ocgrk, ".insn rrf, 0xB9650000, %[res], %[b], %[a], 0\n")
int main(int argc, char *argv[])
{
if (_ncrk(0xFF88, 0xAA11) != 0x0000032100000011ull ||
_nnrk(0xFF88, 0xAA11) != 0x00000321FFFF55FFull ||
_nork(0xFF88, 0xAA11) != 0x00000321FFFF0066ull ||
_nxrk(0xFF88, 0xAA11) != 0x00000321FFFFAA66ull ||
_ocrk(0xFF88, 0xAA11) != 0x00000321FFFFAA77ull ||
_ncgrk(0xFF88, 0xAA11) != 0x0000000000000011ull ||
_nngrk(0xFF88, 0xAA11) != 0xFFFFFFFFFFFF55FFull ||
_nogrk(0xFF88, 0xAA11) != 0xFFFFFFFFFFFF0066ull ||
_nxgrk(0xFF88, 0xAA11) != 0xFFFFFFFFFFFFAA66ull ||
_ocgrk(0xFF88, 0xAA11) != 0xFFFFFFFFFFFFAA77ull)
{
return 1;
}
return 0;
}

27
tests/tcg/s390x/mie3-mvcrl.c Normal file
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@ -0,0 +1,27 @@
#include <stdint.h>
#include <string.h>
static inline void mvcrl_8(const char *dst, const char *src)
{
asm volatile (
"llill %%r0, 8\n"
".insn sse, 0xE50A00000000, 0(%[dst]), 0(%[src])"
: : [dst] "d" (dst), [src] "d" (src)
: "memory");
}
int main(int argc, char *argv[])
{
const char *alpha = "abcdefghijklmnop";
/* array missing 'i' */
char tstr[17] = "abcdefghjklmnop\0" ;
/* mvcrl reference use: 'open a hole in an array' */
mvcrl_8(tstr + 9, tstr + 8);
/* place missing 'i' */
tstr[8] = 'i';
return strncmp(alpha, tstr, 16ul);
}

38
tests/tcg/s390x/mie3-sel.c Normal file
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@ -0,0 +1,38 @@
#include <stdint.h>
#define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \
{ \
uint64_t res = 0; \
asm ( \
"lg %%r2, %[a]\n" \
"lg %%r3, %[b]\n" \
"lg %%r0, %[c]\n" \
"ltgr %%r0, %%r0\n" \
ASM \
"stg %%r0, %[res] " \
: [res] "=m" (res) \
: [a] "m" (a), \
[b] "m" (b), \
[c] "m" (c) \
: "r0", "r2", \
"r3", "r4" \
); \
return res; \
}
Fi3 (_selre, ".insn rrf, 0xB9F00000, %%r0, %%r3, %%r2, 8\n")
Fi3 (_selgrz, ".insn rrf, 0xB9E30000, %%r0, %%r3, %%r2, 8\n")
Fi3 (_selfhrnz, ".insn rrf, 0xB9C00000, %%r0, %%r3, %%r2, 7\n")
int main(int argc, char *argv[])
{
uint64_t a = ~0, b = ~0, c = ~0;
a = _selre(0x066600000066ull, 0x066600000006ull, a);
b = _selgrz(0xF00D00000005ull, 0xF00D00000055ull, b);
c = _selfhrnz(0x043200000044ull, 0x065400000004ull, c);
return (int) (
(0xFFFFFFFF00000066ull != a) ||
(0x0000F00D00000005ull != b) ||
(0x00000654FFFFFFFFull != c));
}