target/arm: Use TRANS_FEAT for FCMLA_zzxz

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-108-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-05-27 11:19:00 -07:00 committed by Peter Maydell
parent df9024760e
commit e600d64980
1 changed files with 6 additions and 13 deletions

View File

@ -4018,19 +4018,12 @@ TRANS_FEAT(FCMLA_zpzzz, aa64_sve, gen_gvec_fpst_zzzzp, fcmla_fns[a->esz],
a->rd, a->rn, a->rm, a->ra, a->pg, a->rot,
a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR)
static bool trans_FCMLA_zzxz(DisasContext *s, arg_FCMLA_zzxz *a)
{
static gen_helper_gvec_4_ptr * const fns[4] = {
NULL,
gen_helper_gvec_fcmlah_idx,
gen_helper_gvec_fcmlas_idx,
NULL,
};
return gen_gvec_fpst_zzzz(s, fns[a->esz], a->rd, a->rn, a->rm, a->ra,
a->index * 4 + a->rot,
a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR);
}
static gen_helper_gvec_4_ptr * const fcmla_idx_fns[4] = {
NULL, gen_helper_gvec_fcmlah_idx, gen_helper_gvec_fcmlas_idx, NULL
};
TRANS_FEAT(FCMLA_zzxz, aa64_sve, gen_gvec_fpst_zzzz, fcmla_idx_fns[a->esz],
a->rd, a->rn, a->rm, a->ra, a->index * 4 + a->rot,
a->esz == MO_16 ? FPST_FPCR_F16 : FPST_FPCR)
/*
*** SVE Floating Point Unary Operations Predicated Group