Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
5c6a0628b7
commit
ece43b8d06
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@ -2078,9 +2078,9 @@ static void disas_sparc_insn(DisasContext * dc)
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SPARCv8 manual, rdy on the
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microSPARC II */
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#endif
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, y));
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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break;
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#ifdef TARGET_SPARC64
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case 0x2: /* V9 rdccr */
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@ -2126,14 +2126,14 @@ static void disas_sparc_insn(DisasContext * dc)
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case 0x13: /* Graphics Status */
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if (gen_trap_ifnofpu(dc, cpu_cond))
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goto jmp_insn;
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, gsr));
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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break;
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case 0x17: /* Tick compare */
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, tick_cmpr));
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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break;
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case 0x18: /* System tick */
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{
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@ -2149,9 +2149,9 @@ static void disas_sparc_insn(DisasContext * dc)
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}
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break;
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case 0x19: /* System tick compare */
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, stick_cmpr));
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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break;
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case 0x10: /* Performance Control */
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case 0x11: /* Performance Instrumentation Counter */
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@ -2219,7 +2219,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_ld_tl(cpu_dst, r_tsptr,
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tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tpc));
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tcg_temp_free(r_tsptr);
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}
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@ -2231,7 +2231,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_ld_tl(cpu_dst, r_tsptr,
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tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tnpc));
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tcg_temp_free(r_tsptr);
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}
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@ -2243,7 +2243,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_ld_tl(cpu_dst, r_tsptr,
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tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tstate));
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tcg_temp_free(r_tsptr);
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}
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@ -2255,7 +2255,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_ld_i32(cpu_dst, r_tsptr,
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tcg_gen_ld_i32(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tt));
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tcg_temp_free(r_tsptr);
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}
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@ -2267,73 +2267,73 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tickptr, cpu_env,
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offsetof(CPUState, tick));
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tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst,
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tcg_gen_helper_1_1(helper_tick_get_count, cpu_tmp0,
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r_tickptr);
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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tcg_temp_free(r_tickptr);
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}
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break;
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case 5: // tba
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, tbr));
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break;
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case 6: // pstate
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, pstate));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 7: // tl
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, tl));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 8: // pil
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, psrpil));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 9: // cwp
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tcg_gen_helper_1_0(helper_rdcwp, cpu_dst);
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tcg_gen_helper_1_0(helper_rdcwp, cpu_tmp0);
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break;
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case 10: // cansave
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, cansave));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 11: // canrestore
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, canrestore));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 12: // cleanwin
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, cleanwin));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 13: // otherwin
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, otherwin));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 14: // wstate
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, wstate));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 16: // UA2005 gl
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, gl));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 26: // UA2005 strand status
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if (!hypervisor(dc))
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goto priv_insn;
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, ssr));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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break;
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case 31: // ver
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tcg_gen_ld_tl(cpu_dst, cpu_env,
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tcg_gen_ld_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, version));
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break;
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case 15: // fq
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@ -2343,9 +2343,9 @@ static void disas_sparc_insn(DisasContext * dc)
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#else
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tcg_gen_ld_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, wim));
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tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
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tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
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#endif
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gen_movl_TN_reg(rd, cpu_dst);
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gen_movl_TN_reg(rd, cpu_tmp0);
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break;
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} else if (xop == 0x2b) { /* rdtbr / V9 flushw */
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#ifdef TARGET_SPARC64
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@ -2353,8 +2353,8 @@ static void disas_sparc_insn(DisasContext * dc)
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#else
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if (!supervisor(dc))
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goto priv_insn;
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tcg_gen_ld_tl(cpu_dst, cpu_env, offsetof(CPUSPARCState, tbr));
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gen_movl_TN_reg(rd, cpu_dst);
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tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, tbr));
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gen_movl_TN_reg(rd, cpu_tmp0);
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#endif
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break;
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#endif
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@ -3149,8 +3149,8 @@ static void disas_sparc_insn(DisasContext * dc)
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{
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switch(rd) {
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case 0: /* wry */
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tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
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tcg_gen_st_tl(cpu_dst, cpu_env,
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tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
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tcg_gen_st_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, y));
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break;
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#ifndef TARGET_SPARC64
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@ -3193,8 +3193,8 @@ static void disas_sparc_insn(DisasContext * dc)
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case 0x13: /* Graphics Status */
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if (gen_trap_ifnofpu(dc, cpu_cond))
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goto jmp_insn;
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tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
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tcg_gen_st_tl(cpu_dst, cpu_env,
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tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
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tcg_gen_st_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, gsr));
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break;
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case 0x17: /* Tick compare */
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@ -3205,16 +3205,16 @@ static void disas_sparc_insn(DisasContext * dc)
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{
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TCGv r_tickptr;
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tcg_gen_xor_tl(cpu_dst, cpu_src1,
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tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
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cpu_src2);
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tcg_gen_st_tl(cpu_dst, cpu_env,
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tcg_gen_st_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState,
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tick_cmpr));
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r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tickptr, cpu_env,
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offsetof(CPUState, tick));
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tcg_gen_helper_0_2(helper_tick_set_limit,
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r_tickptr, cpu_dst);
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r_tickptr, cpu_tmp0);
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tcg_temp_free(r_tickptr);
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}
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break;
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@ -3244,16 +3244,16 @@ static void disas_sparc_insn(DisasContext * dc)
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{
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TCGv r_tickptr;
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tcg_gen_xor_tl(cpu_dst, cpu_src1,
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tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
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cpu_src2);
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tcg_gen_st_tl(cpu_dst, cpu_env,
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tcg_gen_st_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState,
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stick_cmpr));
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r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tickptr, cpu_env,
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offsetof(CPUState, stick));
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tcg_gen_helper_0_2(helper_tick_set_limit,
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r_tickptr, cpu_dst);
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r_tickptr, cpu_tmp0);
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tcg_temp_free(r_tickptr);
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}
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break;
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@ -3306,7 +3306,7 @@ static void disas_sparc_insn(DisasContext * dc)
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{
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if (!supervisor(dc))
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goto priv_insn;
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tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
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tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
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#ifdef TARGET_SPARC64
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switch (rd) {
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case 0: // tpc
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@ -3316,7 +3316,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_st_tl(cpu_dst, r_tsptr,
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tcg_gen_st_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tpc));
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tcg_temp_free(r_tsptr);
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}
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@ -3328,7 +3328,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_st_tl(cpu_dst, r_tsptr,
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tcg_gen_st_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tnpc));
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tcg_temp_free(r_tsptr);
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}
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@ -3340,7 +3340,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_st_tl(cpu_dst, r_tsptr,
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tcg_gen_st_tl(cpu_tmp0, r_tsptr,
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offsetof(trap_state,
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tstate));
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tcg_temp_free(r_tsptr);
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@ -3353,7 +3353,7 @@ static void disas_sparc_insn(DisasContext * dc)
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r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
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tcg_gen_ld_ptr(r_tsptr, cpu_env,
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offsetof(CPUState, tsptr));
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tcg_gen_st_i32(cpu_dst, r_tsptr,
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tcg_gen_st_i32(cpu_tmp0, r_tsptr,
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offsetof(trap_state, tt));
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tcg_temp_free(r_tsptr);
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}
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@ -3366,74 +3366,74 @@ static void disas_sparc_insn(DisasContext * dc)
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tcg_gen_ld_ptr(r_tickptr, cpu_env,
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offsetof(CPUState, tick));
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tcg_gen_helper_0_2(helper_tick_set_count,
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r_tickptr, cpu_dst);
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r_tickptr, cpu_tmp0);
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tcg_temp_free(r_tickptr);
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}
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break;
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case 5: // tba
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tcg_gen_st_tl(cpu_dst, cpu_env,
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tcg_gen_st_tl(cpu_tmp0, cpu_env,
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offsetof(CPUSPARCState, tbr));
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break;
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case 6: // pstate
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save_state(dc, cpu_cond);
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tcg_gen_helper_0_1(helper_wrpstate, cpu_dst);
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tcg_gen_helper_0_1(helper_wrpstate, cpu_tmp0);
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gen_op_next_insn();
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tcg_gen_exit_tb(0);
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dc->is_br = 1;
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break;
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case 7: // tl
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
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tcg_gen_st_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState, tl));
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break;
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case 8: // pil
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
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tcg_gen_st_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState,
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psrpil));
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break;
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case 9: // cwp
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tcg_gen_helper_0_1(helper_wrcwp, cpu_dst);
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tcg_gen_helper_0_1(helper_wrcwp, cpu_tmp0);
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break;
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case 10: // cansave
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
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tcg_gen_st_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState,
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cansave));
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break;
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case 11: // canrestore
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
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tcg_gen_st_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState,
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canrestore));
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break;
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case 12: // cleanwin
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
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tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
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tcg_gen_st_i32(cpu_tmp32, cpu_env,
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offsetof(CPUSPARCState,
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cleanwin));
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break;
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case 13: // otherwin
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||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState,
|
||||
otherwin));
|
||||
break;
|
||||
case 14: // wstate
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState,
|
||||
wstate));
|
||||
break;
|
||||
case 16: // UA2005 gl
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState, gl));
|
||||
break;
|
||||
case 26: // UA2005 strand status
|
||||
if (!hypervisor(dc))
|
||||
goto priv_insn;
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState, ssr));
|
||||
break;
|
||||
|
|
@ -3441,7 +3441,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
|||
goto illegal_insn;
|
||||
}
|
||||
#else
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState, wim));
|
||||
#endif
|
||||
|
|
@ -3452,13 +3452,13 @@ static void disas_sparc_insn(DisasContext * dc)
|
|||
#ifndef TARGET_SPARC64
|
||||
if (!supervisor(dc))
|
||||
goto priv_insn;
|
||||
tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2);
|
||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
||||
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||
offsetof(CPUSPARCState, tbr));
|
||||
#else
|
||||
if (!hypervisor(dc))
|
||||
goto priv_insn;
|
||||
tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2);
|
||||
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||
switch (rd) {
|
||||
case 0: // hpstate
|
||||
// XXX gen_op_wrhpstate();
|
||||
|
|
@ -3471,12 +3471,12 @@ static void disas_sparc_insn(DisasContext * dc)
|
|||
// XXX gen_op_wrhtstate();
|
||||
break;
|
||||
case 3: // hintp
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState, hintp));
|
||||
break;
|
||||
case 5: // htba
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||
offsetof(CPUSPARCState, htba));
|
||||
break;
|
||||
|
|
@ -3484,14 +3484,14 @@ static void disas_sparc_insn(DisasContext * dc)
|
|||
{
|
||||
TCGv r_tickptr;
|
||||
|
||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
||||
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||
offsetof(CPUSPARCState,
|
||||
hstick_cmpr));
|
||||
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||
offsetof(CPUState, hstick));
|
||||
tcg_gen_helper_0_2(helper_tick_set_limit,
|
||||
r_tickptr, cpu_dst);
|
||||
r_tickptr, cpu_tmp0);
|
||||
tcg_temp_free(r_tickptr);
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
Loading…
Reference in New Issue