Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
5c6a0628b7
commit
ece43b8d06
|
@ -2078,9 +2078,9 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
SPARCv8 manual, rdy on the
|
SPARCv8 manual, rdy on the
|
||||||
microSPARC II */
|
microSPARC II */
|
||||||
#endif
|
#endif
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, y));
|
offsetof(CPUSPARCState, y));
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
#ifdef TARGET_SPARC64
|
#ifdef TARGET_SPARC64
|
||||||
case 0x2: /* V9 rdccr */
|
case 0x2: /* V9 rdccr */
|
||||||
|
@ -2126,14 +2126,14 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
case 0x13: /* Graphics Status */
|
case 0x13: /* Graphics Status */
|
||||||
if (gen_trap_ifnofpu(dc, cpu_cond))
|
if (gen_trap_ifnofpu(dc, cpu_cond))
|
||||||
goto jmp_insn;
|
goto jmp_insn;
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, gsr));
|
offsetof(CPUSPARCState, gsr));
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
case 0x17: /* Tick compare */
|
case 0x17: /* Tick compare */
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, tick_cmpr));
|
offsetof(CPUSPARCState, tick_cmpr));
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
case 0x18: /* System tick */
|
case 0x18: /* System tick */
|
||||||
{
|
{
|
||||||
|
@ -2149,9 +2149,9 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 0x19: /* System tick compare */
|
case 0x19: /* System tick compare */
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, stick_cmpr));
|
offsetof(CPUSPARCState, stick_cmpr));
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
case 0x10: /* Performance Control */
|
case 0x10: /* Performance Control */
|
||||||
case 0x11: /* Performance Instrumentation Counter */
|
case 0x11: /* Performance Instrumentation Counter */
|
||||||
|
@ -2219,7 +2219,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_ld_tl(cpu_dst, r_tsptr,
|
tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tpc));
|
offsetof(trap_state, tpc));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -2231,7 +2231,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_ld_tl(cpu_dst, r_tsptr,
|
tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tnpc));
|
offsetof(trap_state, tnpc));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -2243,7 +2243,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_ld_tl(cpu_dst, r_tsptr,
|
tcg_gen_ld_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tstate));
|
offsetof(trap_state, tstate));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -2255,7 +2255,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_ld_i32(cpu_dst, r_tsptr,
|
tcg_gen_ld_i32(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tt));
|
offsetof(trap_state, tt));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -2267,73 +2267,73 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||||
offsetof(CPUState, tick));
|
offsetof(CPUState, tick));
|
||||||
tcg_gen_helper_1_1(helper_tick_get_count, cpu_dst,
|
tcg_gen_helper_1_1(helper_tick_get_count, cpu_tmp0,
|
||||||
r_tickptr);
|
r_tickptr);
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
tcg_temp_free(r_tickptr);
|
tcg_temp_free(r_tickptr);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 5: // tba
|
case 5: // tba
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, tbr));
|
offsetof(CPUSPARCState, tbr));
|
||||||
break;
|
break;
|
||||||
case 6: // pstate
|
case 6: // pstate
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, pstate));
|
offsetof(CPUSPARCState, pstate));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 7: // tl
|
case 7: // tl
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, tl));
|
offsetof(CPUSPARCState, tl));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 8: // pil
|
case 8: // pil
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, psrpil));
|
offsetof(CPUSPARCState, psrpil));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 9: // cwp
|
case 9: // cwp
|
||||||
tcg_gen_helper_1_0(helper_rdcwp, cpu_dst);
|
tcg_gen_helper_1_0(helper_rdcwp, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
case 10: // cansave
|
case 10: // cansave
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, cansave));
|
offsetof(CPUSPARCState, cansave));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 11: // canrestore
|
case 11: // canrestore
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, canrestore));
|
offsetof(CPUSPARCState, canrestore));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 12: // cleanwin
|
case 12: // cleanwin
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, cleanwin));
|
offsetof(CPUSPARCState, cleanwin));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 13: // otherwin
|
case 13: // otherwin
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, otherwin));
|
offsetof(CPUSPARCState, otherwin));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 14: // wstate
|
case 14: // wstate
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, wstate));
|
offsetof(CPUSPARCState, wstate));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 16: // UA2005 gl
|
case 16: // UA2005 gl
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, gl));
|
offsetof(CPUSPARCState, gl));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 26: // UA2005 strand status
|
case 26: // UA2005 strand status
|
||||||
if (!hypervisor(dc))
|
if (!hypervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, ssr));
|
offsetof(CPUSPARCState, ssr));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
break;
|
break;
|
||||||
case 31: // ver
|
case 31: // ver
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env,
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, version));
|
offsetof(CPUSPARCState, version));
|
||||||
break;
|
break;
|
||||||
case 15: // fq
|
case 15: // fq
|
||||||
|
@ -2343,9 +2343,9 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
#else
|
#else
|
||||||
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, wim));
|
offsetof(CPUSPARCState, wim));
|
||||||
tcg_gen_ext_i32_tl(cpu_dst, cpu_tmp32);
|
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
|
||||||
#endif
|
#endif
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
} else if (xop == 0x2b) { /* rdtbr / V9 flushw */
|
} else if (xop == 0x2b) { /* rdtbr / V9 flushw */
|
||||||
#ifdef TARGET_SPARC64
|
#ifdef TARGET_SPARC64
|
||||||
|
@ -2353,8 +2353,8 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
#else
|
#else
|
||||||
if (!supervisor(dc))
|
if (!supervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_ld_tl(cpu_dst, cpu_env, offsetof(CPUSPARCState, tbr));
|
tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, tbr));
|
||||||
gen_movl_TN_reg(rd, cpu_dst);
|
gen_movl_TN_reg(rd, cpu_tmp0);
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
|
@ -3149,8 +3149,8 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
{
|
{
|
||||||
switch(rd) {
|
switch(rd) {
|
||||||
case 0: /* wry */
|
case 0: /* wry */
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, y));
|
offsetof(CPUSPARCState, y));
|
||||||
break;
|
break;
|
||||||
#ifndef TARGET_SPARC64
|
#ifndef TARGET_SPARC64
|
||||||
|
@ -3193,8 +3193,8 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
case 0x13: /* Graphics Status */
|
case 0x13: /* Graphics Status */
|
||||||
if (gen_trap_ifnofpu(dc, cpu_cond))
|
if (gen_trap_ifnofpu(dc, cpu_cond))
|
||||||
goto jmp_insn;
|
goto jmp_insn;
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, gsr));
|
offsetof(CPUSPARCState, gsr));
|
||||||
break;
|
break;
|
||||||
case 0x17: /* Tick compare */
|
case 0x17: /* Tick compare */
|
||||||
|
@ -3205,16 +3205,16 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
{
|
{
|
||||||
TCGv r_tickptr;
|
TCGv r_tickptr;
|
||||||
|
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_src1,
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
|
||||||
cpu_src2);
|
cpu_src2);
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
tick_cmpr));
|
tick_cmpr));
|
||||||
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||||
offsetof(CPUState, tick));
|
offsetof(CPUState, tick));
|
||||||
tcg_gen_helper_0_2(helper_tick_set_limit,
|
tcg_gen_helper_0_2(helper_tick_set_limit,
|
||||||
r_tickptr, cpu_dst);
|
r_tickptr, cpu_tmp0);
|
||||||
tcg_temp_free(r_tickptr);
|
tcg_temp_free(r_tickptr);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -3244,16 +3244,16 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
{
|
{
|
||||||
TCGv r_tickptr;
|
TCGv r_tickptr;
|
||||||
|
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_src1,
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1,
|
||||||
cpu_src2);
|
cpu_src2);
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
stick_cmpr));
|
stick_cmpr));
|
||||||
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||||
offsetof(CPUState, stick));
|
offsetof(CPUState, stick));
|
||||||
tcg_gen_helper_0_2(helper_tick_set_limit,
|
tcg_gen_helper_0_2(helper_tick_set_limit,
|
||||||
r_tickptr, cpu_dst);
|
r_tickptr, cpu_tmp0);
|
||||||
tcg_temp_free(r_tickptr);
|
tcg_temp_free(r_tickptr);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -3306,7 +3306,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
{
|
{
|
||||||
if (!supervisor(dc))
|
if (!supervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||||
#ifdef TARGET_SPARC64
|
#ifdef TARGET_SPARC64
|
||||||
switch (rd) {
|
switch (rd) {
|
||||||
case 0: // tpc
|
case 0: // tpc
|
||||||
|
@ -3316,7 +3316,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_st_tl(cpu_dst, r_tsptr,
|
tcg_gen_st_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tpc));
|
offsetof(trap_state, tpc));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -3328,7 +3328,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_st_tl(cpu_dst, r_tsptr,
|
tcg_gen_st_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tnpc));
|
offsetof(trap_state, tnpc));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -3340,7 +3340,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_st_tl(cpu_dst, r_tsptr,
|
tcg_gen_st_tl(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state,
|
offsetof(trap_state,
|
||||||
tstate));
|
tstate));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
|
@ -3353,7 +3353,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tsptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
tcg_gen_ld_ptr(r_tsptr, cpu_env,
|
||||||
offsetof(CPUState, tsptr));
|
offsetof(CPUState, tsptr));
|
||||||
tcg_gen_st_i32(cpu_dst, r_tsptr,
|
tcg_gen_st_i32(cpu_tmp0, r_tsptr,
|
||||||
offsetof(trap_state, tt));
|
offsetof(trap_state, tt));
|
||||||
tcg_temp_free(r_tsptr);
|
tcg_temp_free(r_tsptr);
|
||||||
}
|
}
|
||||||
|
@ -3366,74 +3366,74 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||||
offsetof(CPUState, tick));
|
offsetof(CPUState, tick));
|
||||||
tcg_gen_helper_0_2(helper_tick_set_count,
|
tcg_gen_helper_0_2(helper_tick_set_count,
|
||||||
r_tickptr, cpu_dst);
|
r_tickptr, cpu_tmp0);
|
||||||
tcg_temp_free(r_tickptr);
|
tcg_temp_free(r_tickptr);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 5: // tba
|
case 5: // tba
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, tbr));
|
offsetof(CPUSPARCState, tbr));
|
||||||
break;
|
break;
|
||||||
case 6: // pstate
|
case 6: // pstate
|
||||||
save_state(dc, cpu_cond);
|
save_state(dc, cpu_cond);
|
||||||
tcg_gen_helper_0_1(helper_wrpstate, cpu_dst);
|
tcg_gen_helper_0_1(helper_wrpstate, cpu_tmp0);
|
||||||
gen_op_next_insn();
|
gen_op_next_insn();
|
||||||
tcg_gen_exit_tb(0);
|
tcg_gen_exit_tb(0);
|
||||||
dc->is_br = 1;
|
dc->is_br = 1;
|
||||||
break;
|
break;
|
||||||
case 7: // tl
|
case 7: // tl
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, tl));
|
offsetof(CPUSPARCState, tl));
|
||||||
break;
|
break;
|
||||||
case 8: // pil
|
case 8: // pil
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
psrpil));
|
psrpil));
|
||||||
break;
|
break;
|
||||||
case 9: // cwp
|
case 9: // cwp
|
||||||
tcg_gen_helper_0_1(helper_wrcwp, cpu_dst);
|
tcg_gen_helper_0_1(helper_wrcwp, cpu_tmp0);
|
||||||
break;
|
break;
|
||||||
case 10: // cansave
|
case 10: // cansave
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
cansave));
|
cansave));
|
||||||
break;
|
break;
|
||||||
case 11: // canrestore
|
case 11: // canrestore
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
canrestore));
|
canrestore));
|
||||||
break;
|
break;
|
||||||
case 12: // cleanwin
|
case 12: // cleanwin
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
cleanwin));
|
cleanwin));
|
||||||
break;
|
break;
|
||||||
case 13: // otherwin
|
case 13: // otherwin
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
otherwin));
|
otherwin));
|
||||||
break;
|
break;
|
||||||
case 14: // wstate
|
case 14: // wstate
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
wstate));
|
wstate));
|
||||||
break;
|
break;
|
||||||
case 16: // UA2005 gl
|
case 16: // UA2005 gl
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, gl));
|
offsetof(CPUSPARCState, gl));
|
||||||
break;
|
break;
|
||||||
case 26: // UA2005 strand status
|
case 26: // UA2005 strand status
|
||||||
if (!hypervisor(dc))
|
if (!hypervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, ssr));
|
offsetof(CPUSPARCState, ssr));
|
||||||
break;
|
break;
|
||||||
|
@ -3441,7 +3441,7 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
goto illegal_insn;
|
goto illegal_insn;
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, wim));
|
offsetof(CPUSPARCState, wim));
|
||||||
#endif
|
#endif
|
||||||
|
@ -3452,13 +3452,13 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
#ifndef TARGET_SPARC64
|
#ifndef TARGET_SPARC64
|
||||||
if (!supervisor(dc))
|
if (!supervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2);
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState, tbr));
|
offsetof(CPUSPARCState, tbr));
|
||||||
#else
|
#else
|
||||||
if (!hypervisor(dc))
|
if (!hypervisor(dc))
|
||||||
goto priv_insn;
|
goto priv_insn;
|
||||||
tcg_gen_xor_tl(cpu_dst, cpu_dst, cpu_src2);
|
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);
|
||||||
switch (rd) {
|
switch (rd) {
|
||||||
case 0: // hpstate
|
case 0: // hpstate
|
||||||
// XXX gen_op_wrhpstate();
|
// XXX gen_op_wrhpstate();
|
||||||
|
@ -3471,12 +3471,12 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
// XXX gen_op_wrhtstate();
|
// XXX gen_op_wrhtstate();
|
||||||
break;
|
break;
|
||||||
case 3: // hintp
|
case 3: // hintp
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, hintp));
|
offsetof(CPUSPARCState, hintp));
|
||||||
break;
|
break;
|
||||||
case 5: // htba
|
case 5: // htba
|
||||||
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
|
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
|
||||||
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
tcg_gen_st_i32(cpu_tmp32, cpu_env,
|
||||||
offsetof(CPUSPARCState, htba));
|
offsetof(CPUSPARCState, htba));
|
||||||
break;
|
break;
|
||||||
|
@ -3484,14 +3484,14 @@ static void disas_sparc_insn(DisasContext * dc)
|
||||||
{
|
{
|
||||||
TCGv r_tickptr;
|
TCGv r_tickptr;
|
||||||
|
|
||||||
tcg_gen_st_tl(cpu_dst, cpu_env,
|
tcg_gen_st_tl(cpu_tmp0, cpu_env,
|
||||||
offsetof(CPUSPARCState,
|
offsetof(CPUSPARCState,
|
||||||
hstick_cmpr));
|
hstick_cmpr));
|
||||||
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
r_tickptr = tcg_temp_new(TCG_TYPE_PTR);
|
||||||
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
tcg_gen_ld_ptr(r_tickptr, cpu_env,
|
||||||
offsetof(CPUState, hstick));
|
offsetof(CPUState, hstick));
|
||||||
tcg_gen_helper_0_2(helper_tick_set_limit,
|
tcg_gen_helper_0_2(helper_tick_set_limit,
|
||||||
r_tickptr, cpu_dst);
|
r_tickptr, cpu_tmp0);
|
||||||
tcg_temp_free(r_tickptr);
|
tcg_temp_free(r_tickptr);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
Loading…
Reference in New Issue