hw/rtc/mc146818rtc: Convert to 3-phase reset (Resettable interface)

TYPE_MC146818_RTC is an ISA device, so its DeviceClass::reset()
handler is called automatically when its qbus parent is reset
(we don't need to register it manually).

We have 2 reset() methods: a generic one and the qdev one.
Merge them into a reset_enter handler (keeping the IRQ lowering
to a reset_hold one), and remove the qemu_register_reset() call.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <20210502163931.552675-3-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Philippe Mathieu-Daudé 2021-05-02 18:39:31 +02:00 committed by Laurent Vivier
parent 72fe4742c6
commit fae5a04207
1 changed files with 22 additions and 20 deletions

View File

@ -871,22 +871,6 @@ static void rtc_notify_suspend(Notifier *notifier, void *data)
rtc_set_memory(ISA_DEVICE(s), 0xF, 0xFE);
}
static void rtc_reset(void *opaque)
{
RTCState *s = opaque;
s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
check_update_timer(s);
qemu_irq_lower(s->irq);
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
s->irq_coalesced = 0;
s->irq_reinject_on_ack_count = 0;
}
}
static const MemoryRegionOps cmos_ops = {
.read = cmos_ioport_read,
.write = cmos_ioport_write,
@ -961,7 +945,6 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
memory_region_add_coalescing(&s->coalesced_io, 0, 1);
qdev_set_legacy_instance_id(dev, RTC_ISA_BASE, 3);
qemu_register_reset(rtc_reset, s);
object_property_add_tm(OBJECT(s), "date", rtc_get_date);
@ -997,15 +980,32 @@ static Property mc146818rtc_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
static void rtc_resetdev(DeviceState *d)
static void rtc_reset_enter(Object *obj, ResetType type)
{
RTCState *s = MC146818_RTC(d);
RTCState *s = MC146818_RTC(obj);
/* Reason: VM do suspend self will set 0xfe
* Reset any values other than 0xfe(Guest suspend case) */
if (s->cmos_data[0x0f] != 0xfe) {
s->cmos_data[0x0f] = 0x00;
}
s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
check_update_timer(s);
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW) {
s->irq_coalesced = 0;
s->irq_reinject_on_ack_count = 0;
}
}
static void rtc_reset_hold(Object *obj)
{
RTCState *s = MC146818_RTC(obj);
qemu_irq_lower(s->irq);
}
static void rtc_build_aml(ISADevice *isadev, Aml *scope)
@ -1032,11 +1032,13 @@ static void rtc_build_aml(ISADevice *isadev, Aml *scope)
static void rtc_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
dc->realize = rtc_realizefn;
dc->reset = rtc_resetdev;
dc->vmsd = &vmstate_rtc;
rc->phases.enter = rtc_reset_enter;
rc->phases.hold = rtc_reset_hold;
isa->build_aml = rtc_build_aml;
device_class_set_props(dc, mc146818rtc_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);