target/riscv: Allow debugger to access user timer and counter CSRs
At present user timer and counter CSRs are not reported in the CSR XML hence gdb cannot access them. Fix it by adding a debugger check in their predicate() routine. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-ID: <20230228104035.1879882-14-bmeng@tinylab.org> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
parent
7eac8f4191
commit
fb517fdb15
|
@ -131,6 +131,10 @@ static RISCVException ctr(CPURISCVState *env, int csrno)
|
|||
|
||||
skip_ext_pmu_check:
|
||||
|
||||
if (env->debugger) {
|
||||
return RISCV_EXCP_NONE;
|
||||
}
|
||||
|
||||
if (env->priv < PRV_M && !get_field(env->mcounteren, ctr_mask)) {
|
||||
return RISCV_EXCP_ILLEGAL_INST;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue