Commit Graph

19 Commits

Author SHA1 Message Date
Paolo Bonzini 022c62cbbc exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:31:31 +01:00
Paolo Bonzini 1422e32db5 net: reorganize headers
Move public headers to include/net, and leave private headers in net/.
Put the virtio headers in include/net/tap.h, removing the multiple copies
that existed.  Leave include/net/tap.h as the interface for NICs, and
net/tap_int.h as the interface for OS-specific parts of the tap backend.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:31:29 +01:00
Anthony Liguori e376a788ae Merge remote-tracking branch 'kwolf/for-anthony' into staging
* kwolf/for-anthony: (43 commits)
  qcow2: Factor out handle_dependencies()
  qcow2: Execute run_dependent_requests() without lock
  qcow2: Enable dirty flag in qcow2_alloc_cluster_link_l2
  qcow2: Allocate l2meta only for cluster allocations
  qcow2: Drop l2meta.cluster_offset
  qcow2: Allocate l2meta dynamically
  qcow2: Introduce Qcow2COWRegion
  qcow2: Round QCowL2Meta.offset down to cluster boundary
  atapi: reset cdrom tray statuses on ide_reset
  qemu-iotests: Test concurrent cluster allocations
  qcow2: Move BLKDBG_EVENT out of the lock
  qemu-io: Add AIO debugging commands
  blkdebug: Implement suspend/resume of AIO requests
  blkdebug: Factor out remove_rule()
  blkdebug: Allow usage without config file
  create new function: qemu_opt_set_number
  use qemu_opts_create_nofail
  introduce qemu_opts_create_nofail function
  qemu-option: qemu_opt_set_bool(): fix code duplication
  qemu-option: qemu_opts_validate(): fix duplicated code
  ...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-13 14:32:28 -06:00
Peter Maydell bf471f7950 hw/arm_boot, exynos4210, highbank: Fix secondary boot GIC init
Fix the code in the secondary CPU boot stubs so that it correctly
initialises the GIC rather than relying on bugs or implementation
dependent aspects of the QEMU GIC implementation:
 * set the GIC_PMR.Priority field to all-ones, so that all
   interrupts are passed through. The default of all-zeroes
   means all interrupts are masked, and QEMU only booted because
   of a bug in the priority masking in our GIC implementation.
 * add a barrier after GIC setup and before WFI to ensure that
   GIC config is complete before we go into a possible low power
   state. This isn't needed with the software GIC model but could
   be required when using KVM and executing this code on the
   real hardware CPU.

Note that of the three secondary stub implementations, only
the common generic one needs to support both v6 and v7 DSB
encodings; highbank and exynos4210 will always be v7 CPUs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
2012-12-11 11:30:37 +00:00
Christian Borntraeger 2d0d2837dc Support default block interfaces per QEMUMachine
There are QEMUMachines that have neither IF_IDE nor IF_SCSI as a
default/standard interface to their block devices / drives. Therefore,
this patch introduces a new field default_block_type per QEMUMachine
struct. The prior use_scsi field becomes thereby obsolete and is
replaced through .default_block_type = IF_SCSI.

This patch also changes the default for s390x to IF_VIRTIO and
removes an early hack that converts IF_IDE drives.
Other parties have already claimed interest (e.g. IF_SD for exynos)

To create a sane default, for machines that dont specify a
default_block_type, this patch makes IF_IDE = 0 and IF_NONE = 1.
I checked all users of IF_NONE (blockdev.c and ww/device-hotplug.c)
as well as IF_IDE and it seems that it is ok to change the defines -
in other words, I found no obvious (to me) assumption in the code
regarding IF_NONE==0. IF_NONE is only set if there is an
explicit if=none. Without if=* the interface becomes IF_DEFAULT.

I would suggest to have some additional care, e.g. by letting
this patch sit some days in the block tree.

Based on an initial patch from Einar Lueck <elelueck@de.ibm.com>

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
CC: Igor Mitsyanko <i.mitsyanko@samsung.com>
CC: Markus Armbruster <armbru@redhat.com>
CC: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-11 11:05:10 +01:00
Avi Kivity a8170e5e97 Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-23 08:58:25 -05:00
Eduardo Habkost 5f072e1f30 create struct for machine initialization arguments
This should help us to:
- More easily add or remove machine initialization arguments without
  having to change every single machine init function;
- More easily make mechanical changes involving the machine init
  functions in the future;
- Let machine initialization forward the init arguments to other
  functions more easily.

This change was half-mechanical process: first the struct was added with
the local ram_size, boot_device, kernel_*, initrd_*, and cpu_model local
variable initialization to all functions. Then the compiler helped me
locate the local variables that are unused, so they could be removed.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20 07:53:28 +00:00
Stefan Hajnoczi a005d0732f net: Remove VLANState
VLANState is no longer used and can be removed.

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Zhi Yong Wu <wuzhy@linux.vnet.ibm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2012-08-01 12:56:15 +01:00
Andreas Färber 4bd7466166 arm_pic: Pass ARMCPU to arm_pic_init_cpu()
Pass it through to arm_pic_cpu_handler().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
2012-06-11 00:23:04 +02:00
Andreas Färber 3aaa8dfae9 arm_boot: Pass ARMCPU to arm_load_kernel()
In particular this simplifies the &s->mpu->cpu->env expression again.

first_cpu and ->next_cpu are expected to be QOM'ified later.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11 00:23:04 +02:00
Andreas Färber 5d309320e3 arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()
Adapt highbank accordingly.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-11 00:23:04 +02:00
Andreas Färber 9543b0cdd6 arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()
Adapt exynos4210 and highbank accordingly.
The parameter itself is unused.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)
2012-06-11 00:23:04 +02:00
Peter Maydell c5fad12fa0 target-arm: Move A9 config_base_address reset value to ARMCPU
Move the A9 config_base_address cp15 register reset value to
ARMCPU. This should become a QOM property so that the Highbank
board can set it without having to pull in cpu-qom.h, but at
least this avoids the implicit dependency on reset ordering
that the previous workaround had.

Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-27 11:06:18 +00:00
Andreas Färber 5ae9330682 arm hw/: Don't use CPUState
Scripted conversion:
  for file in hw/arm-misc.h hw/arm_boot.c hw/arm_pic.c hw/armv7m.c hw/exynos4210.h hw/highbank.c hw/integratorcp.c hw/musicpal.c hw/omap.h hw/pxa.h hw/pxa2xx_gpio.c hw/pxa2xx_pic.c hw/realview.c hw/strongarm.h hw/versatilepb.c hw/vexpress.c  hw/xilinx_zynq.c ; do
    sed -i "s/CPUState/CPUARMState/g" $file
  done

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:26 +01:00
Peter Maydell 22168e6660 Remove unnecessary includes of primecell.h
The primecell.h header now only has the definitions of constants
indicating the usage of the arm_sysctl GPIO lines; remove obsolete
includes of it from source files which don't care about those GPIO
lines.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17 11:13:42 +00:00
Andreas Färber 83f7d43a9e qom: Unify type registration
Replace device_init() with generalized type_init().

While at it, unify naming convention: type_init([$prefix_]register_types)
Also, type_init() is a function, so add preceding blank line where
necessary and don't put a semicolon after the closing brace.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: malc <av1474@comtv.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15 09:39:21 -06:00
Anthony Liguori 39bffca203 qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:06 -06:00
Anthony Liguori 999e12bbe8 sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.
Converting subclasses independently of their base class is prohibitively hard.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27 10:50:50 -06:00
Rob Herring 2488514cef arm: SoC model for Calxeda Highbank
Adds support for Calxeda's Highbank SoC.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-26 11:49:09 +00:00