797d5db002
Add static (spotted by sparse)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5439 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 19:12:13 +00:00
c55bda30f6
Fix error in fexpand (spotted by sparse)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 18:54:35 +00:00
e18231a3ff
Show size for unassigned accesses (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06 18:46:28 +00:00
f4b1a842d7
Rearrange tick functions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:04:42 +00:00
48585ec51d
Fix missing prototype warnings by moving declarations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:02:42 +00:00
9827e450e4
Fix MXCC printf warning (based on patch by Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 18:06:50 +00:00
cc6747f4c9
Add mmu tlb demap support (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-27 19:43:18 +00:00
e87231d426
Add a generic Niagara machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 19:48:58 +00:00
c99657d303
Implement some UA2007 block ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:07:24 +00:00
b158a785d2
Implement UA2005 hypervisor traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:05:23 +00:00
d81fd7220e
Move also DEBUG_PCALL (see r5085)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:02:48 +00:00
9d92659858
Add software and timer interrupt support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 19:50:28 +00:00
1121f87961
Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 16:52:28 +00:00
ab508019a1
Use the new concat_tl_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 18:43:17 +00:00
a7ec422912
Use the new concat_i32_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 14:49:09 +00:00
f0d5e47183
Move signal handler prototype back to cpu.h
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 09:05:49 +00:00
9f4576f08b
Fix array subscript above array bounds error
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 19:16:21 +00:00
72ccba795b
Fix mulscc with high bits set in either src1 or src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 17:20:52 +00:00
5068cbd9e9
Write zeros to high bits of y, based on patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-11 16:01:02 +00:00
d84763bc17
Convert rest of ops using float32 to TCG, remove FT0 and FT1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:09:22 +00:00
c5d04e99f3
Partially convert float128 conversion ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:00:18 +00:00
e2ea21b396
Convert basic 64 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:35 +00:00
1d01299d29
Convert basic 32 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:13 +00:00
714547bbc7
Convert basic float32 ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:54:51 +00:00
3a3b925d47
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 19:02:49 +00:00
510aba20f0
Fix a typo in fpsub32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:54:01 +00:00
255e1fcb5a
Convert most env fields to TCG registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:51:43 +00:00
47ad35f16a
Silence gcc warning about constant overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:50:16 +00:00
e83ce55068
Implement no-fault loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 17:32:10 +00:00
b991c38519
Fix sign extension problems with smul and umul (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
105a1f04b5
Fix y register loads and stores
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
c8f9349ad9
Remove memcpy32() prototype leftover from r5109
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:22:10 +00:00
ba6a9d8cda
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
91736d378b
Fix Sparc64 boot on i386 host:
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- move do_interrupt() back to op_helper.c
- move non-helper prototypes from helper.h to exec.h
- move some prototypes from cpu.h to exec.h
- do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
but instead provide inline functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:50:21 +00:00
7621a90da8
Fix udiv and sdiv on Sparc64 (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-25 19:43:53 +00:00
c93e7817ee
Fix wrwim masking (Luis Pureza)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:34:42 +00:00
5578ceab94
Use initial CPU definition structure for some CPU fields instead of copying
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them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:33:42 +00:00
2ae72bce02
Correct 32bit carry flag for add instruction (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 08:33:47 +00:00
06057e6f6c
Fix faligndata (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 19:50:16 +00:00
43e9e742b9
Fix I/D MMU tag reads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:16:08 +00:00
01b1fa6d16
Fix Sparc64 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:13:54 +00:00
95f9397c75
Fix offset handling for ASI loads and stores (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 15:28:20 +00:00
a7a044f29e
Handle wrapped registers correctly when saving
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Fix typo
Save and load interrupt_index and pil_in
Original patch by Luis Pureza
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4980 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-01 15:13:58 +00:00
dd5e6304aa
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 18:11:20 +00:00
c19148bd8f
Make MAXTL dynamic, bounds check tl when indexing
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-25 07:42:14 +00:00
0b8f1b102b
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 11:28:51 +00:00
c7ba218da1
Add T1 and T2 CPUs, add a Sun4v machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-22 07:07:34 +00:00
74b9decc47
Use MMU globals for some MMU traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 18:43:32 +00:00
8eba209e33
Fix reset vector
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4917 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 11:17:23 +00:00
f76981b113
Print default and available CPU features separately
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4912 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:23:50 +00:00
blueswir1