Commit Graph

79 Commits

Author SHA1 Message Date
Alexander Graf
1d2e5c5235 PPC: e500: dt: use 64bit cell helper
We have a nice 64bit helper to ease the device tree generation and
make the code more readable when creating 64bit 2-cell parameters.
Use it when generating the device tree.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:49 +02:00
Alexander Graf
25b42708cd dt: Add -machine dumpdtb option to dump the current dtb
Now that we are dynamically creating the dtb, it's really useful to
be able to dump the created blob for debugging.

This patch implements a -machine dumpdtb=<file> option for e500 that
dumps the dtb exactly in the form the guest would get it to disk. It
can then be analyzed by dtc to get information about the guest
configuration.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
2636fcb653 PPC: e500: dt: start with empty device tree
Now that all of the device tree bits are generated during runtime, we
can get rid of the device tree blob and instead start from scratch with
an empty device tree.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
0dbc07985b PPC: e500: dt: create pci node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
f5038483e4 PPC: e500: dt: create global-utils node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
19ac9deacb PPC: e500: dt: create mpic node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
0cfc6e8d9e PPC: e500: dt: create serial nodes dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
5da9662439 PPC: e500: dt: create /soc8544 node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:48 +02:00
Alexander Graf
f5231aafbf PPC: e500: dt: create /chosen node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
51b852b74c PPC: e500: dt: create / node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
d50f71a5fd PPC: e500: dt: create /hypervisor node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
625e665b61 PPC: e500: dt: create /cpus node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
dd0bcfca64 PPC: e500: dt: create memory node dynamically
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
63397dd0be PPC: e500: require libfdt
Now that we're moving all of the device tree generation from an external
pre-execution generated blob to runtime generation using libfdt, we absolutely
must have libfdt around.

This requirement was there before already, as the only way to not require libfdt
with e500 was to not use -kernel, which was the only way to boot the mpc8544ds
machine. This patch only manifests said requirement in the build system.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:47 +02:00
Alexander Graf
cba2026a41 PPC: mpc8544ds: Span initial TLB entry over as much RAM as we need
The initial TLB entry is supposed to help us run the guest -kernel payload.
This means the guest needs to be able to access its own memory, the initrd
memory and the device tree.

So far we only statically reserved a TLB entry from [0;256M[. This patch
fixes it to span from [0;dt_end[, allowing the guest payload to access
everything initially.

Reported-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:44 +02:00
Andreas Färber
38f92da6e7 ppce500_mpc8544ds: Pass PowerPCCPU to mpc8544ds_cpu_reset[_sec]
Allows us to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Alexander Graf <agraf@suse.de>
2012-06-04 23:00:43 +02:00
Andreas Färber
397b457d86 target-ppc: Let cpu_ppc_init() return PowerPCCPU
Adapt e500 mpc8544ds machine accordingly.

Turn cpu_init() into a static inline function returning CPUPPCState for
backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Alexander Graf <agraf@suse.de>
2012-06-04 23:00:43 +02:00
Stefan Weil
5cbdb3a34b Replace Qemu by QEMU in comments
The official spelling is QEMU.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
[blauwirbel@gmail.com: fixed comment style in hw/sun4m.c]
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 14:00:45 +00:00
Andreas Färber
e2684c0b58 ppc hw/: Don't use CPUState
Scripted conversion:
  for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do
    sed -i "s/CPUState/CPUPPCState/g" $file
  done

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:26 +01:00
Andreas Färber
1bba0dc932 Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Avi Kivity
c5705a7728 vmstate, memory: decouple vmstate from memory API
Currently creating a memory region automatically registers it for
live migration.  This differs from other state (which is enumerated
in a VMStateDescription structure) and ties the live migration code
into the memory core.

Decouple the two by introducing a separate API, vmstate_register_ram(),
for registering a RAM block for migration.  Currently the same
implementation is reused, but later it can be moved into a separate list,
and registrations can be moved to VMStateDescription blocks.

Signed-off-by: Avi Kivity <avi@redhat.com>
2012-01-04 13:34:48 +02:00
Avi Kivity
2646c133b5 ppcr500_mpc8544ds: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-17 15:59:17 +02:00
Avi Kivity
df2921d326 Merge remote-tracking branch 'upstream' into memory/batch
* upstream: (87 commits)
  target-alpha: Fix compilation errors for 32 bit hosts
  target-alpha: Add high-resolution access to wall clock and an alarm.
  target-alpha: Implement HALT IPR.
  target-alpha: Implement WAIT IPR.
  target-alpha: Add CLIPPER emulation.
  target-alpha: Add custom PALcode image for CLIPPER emulation.
  target-alpha: Honor icount for RPCC instruction.
  tcg/s390: Remove unused tcg_out_addi()
  tcg/ia64: Remove unused tcg_out_addi()
  ARM: fix segfault
  ppc64: Fix linker script
  pseries: Implement set-time-of-day RTAS function
  pseries: Refactor spapr irq allocation
  PPC: Clean up BookE timer code
  PPC: booke timers
  KVM: PPC: Use HIOR setting for -M pseries with PR KVM
  KVM: Update kernel headers
  KVM: Update kernel headers
  PPC: Fix heathrow PIC to use little endian MMIO
  PPC: Fix via-cuda memory registration
  ...

Conflicts:
	hw/milkymist-uart.c
	hw/ppce500_mpc8544ds.c

Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-09 13:11:50 +02:00
Fabien Chouteau
ddd1055b07 PPC: booke timers
While working on the emulation of the freescale p2010 (e500v2) I realized that
there's no implementation of booke's timers features. Currently mpc8544 uses
ppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (for
example booke uses different SPR).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:09 +02:00
Scott Wood
2bd9543cd3 ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages
This definition is backward compatible with MAV=1.0 as long as
the guest does not set reserved bits in MAS1/MAS4.

Also, fix the shift in booke206_tlb_to_page_size -- it's the base
that should be able to hold a 4G page size, not the shift count.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:04 +02:00
Scott Wood
93dd5e852c kvm: ppc: booke206: use MMU API
Share the TLB array with KVM.  This allows us to set the initial TLB
both on initial boot and reset, is useful for debugging, and could
eventually be used to support migration.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:04 +02:00
Alexander Graf
a2a674204b PPC: E500: Bump CPU count to 15
Now that we have everything in place, make the machine description
aware of the fact that we can now handle 15 virtual CPUs!

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - Max cpus is 15 because of MPIC
2011-10-06 09:48:02 +02:00
Alexander Graf
1e3debf098 MPC8544DS: Generate CPU nodes on init
With this patch, we generate CPU nodes in the machine initialization, giving
us the freedom to generate as many nodes as we want and as the machine supports,
but only those.

This is a first step towards a much cleaner device tree generation
infrastructure, where we would not require precompiled dtb blobs anymore.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:48:02 +02:00
Alexander Graf
10f25a46c5 PPC: E500: Update cpu-release-addr property in cpu nodes
The guest OS wants to know where the guest spins, so let's tell him while
updating the CPU nodes with the frequencies anyways.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - use new spin table address
2011-10-06 09:48:00 +02:00
Alexander Graf
5c145dacac PPC: E500: Add PV spinning code
CPUs that are not the boot CPU need to run in spinning code to check if they
should run off to execute and if so where to jump to. This usually happens
by leaving secondary CPUs looping and checking if some variable in memory
changed.

In an environment like Qemu however we can be more clever. We can just export
the spin table the primary CPU modifies as MMIO region that would event based
wake up the respective secondary CPUs. That saves us quite some cycles while
the secondary CPUs are not up yet.

So this patch adds a PV device that simply exports the spinning table into the
guest and thus allows the primary CPU to wake up secondary ones.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - change into MMIO scheme
  - map the secondary NIP instead of 0 1:1
  - only map 64MB for TLB, same as u-boot
  - prepare code for 64-bit spinnings

v2 -> v3:

  - remove r6
  - set MAS2_M
  - map EA 0
  - use second TLB1 entry

v3 -> v4:

  - change to memoryops

v4 -> v5:

  - fix endianness bugs

v5 -> v6:

  - add header
2011-10-06 09:47:52 +02:00
Alexander Graf
66bc7e0040 PPC: E500: Remove unneeded CPU nodes
We should only keep CPU nodes in the device tree around that we really have
virtual CPUs for. So remove all superfluous entries that we just keep there
in case someone wants to create a lot of vCPUs.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:35 +02:00
Alexander Graf
621d05e301 PPC: E500: Update freqs for all CPUs
Now that we can so nicely find out the host's frequencies, we should also
make sure that we get them into all virtual CPUs' device tree nodes.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:35 +02:00
Alexander Graf
66ae790247 PPC: E500: Remove mpc8544_copy_soc_cell
We don't need mpc8544_copy_soc_cell anymore, since we're explicitly reading
host values and writing guest values respectively.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:34 +02:00
Alexander Graf
911d6e7ad1 PPC: E500: Use generic kvm function for freq
Now that we have generic KVM functions to read out the host tb and clock
frequencies, let's use them in the e500 code!

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:34 +02:00
Alexander Graf
a915249fa1 PPC: E500: Generate IRQ lines for many CPUs
Now that we can generate multiple envs for all our virtual CPUs, we
also need to tell the MPIC that we have multiple CPUs connected and
connect them all to the respective virtual interrupt lines.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:33 +02:00
Alexander Graf
e61c36d58d PPC: E500: create multiple envs
When creating a VM, we should go through smp_cpus and create a virtual CPU for
every CPU the user requested. This patch adds support for that and moves some
code around to make that more convenient.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06 09:43:33 +02:00
Fabien Chouteau
71cf9e6242 openpic: Memory API conversion for mpic
This patch converts mpic to the new memory API (through old mmio).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-02 16:14:02 +02:00
Richard Henderson
39186d8ab8 serial: Add MemoryRegion parameter to serial_mm_init
Remove the get_system_memory() call from serial_mm_init, pushing
it back into the callers.  In many cases we already have the
system memory region available.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-02 16:14:02 +02:00
Richard Henderson
2ff0c7c3c2 serial: Remove ioregister parameter from serial_mm_init
All callers passed 1.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-02 16:14:01 +02:00
Richard Henderson
fb50cfe44d serial: Use enum device_endian in serial_mm_init parameter
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in
many of the callers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-02 16:14:01 +02:00
Anthony Liguori
7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Alexander Graf
d1e256fe47 PPC: E500: Use MAS registers instead of internal TLB representation
The natural format for e500 cores to do TLB manipulation with are the MAS
registers. Instead of converting them into some internal representation
and back again when the guest reads them, we can just keep the data
identical to the way the guest passed it to us.

The main advantage of this approach is that we're getting closer to being
able to share MMU data with KVM using shared memory, so that we don't need
to copy lots of MMU data back and forth all the time. For this to work
however, another patch is required that gets rid of the TLB union, as that
destroys our memory layout that needs to be identical with the kernel one.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-17 02:58:34 +02:00
Alexander Graf
5de6b46db5 PPC: mpc8544ds: Add hypervisor node
When running a PPC guest with KVM that can do PV operations, we need
to indicate the guest which instructions to use for a hypercall and
that it is running as KVM guest.

This logic was available on openbios based machines already. This patch
also adds said functionality to the mpc8544ds machine.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2011-06-17 02:58:28 +02:00
Alexander Graf
b0fb84236d PPC: E500: Implement reboot controller
When Linux reboots an e500 VM, it writes to a magic register in the
"global-utilities" device indicated by the device tree. We were not
emulating that device so far, rendering the VM reboot-less.

This patch implements that device with only the reboot functionality
implemented and adds it to the device tree. With this patch applied,
I can successfully reboot a -M mpc8544ds VM.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Andreas Färber <andreas.faerber@web.de>
2011-06-17 02:58:23 +02:00
Alexander Graf
d461e3b929 PPC: fix mpc8544ds pci default devices
After the Qdev'ification of the MPC8544DS board and PCI bus, the internal
PCI bus name changed from "pci" to "pci.0". Reflect this change in the
search for that bus.

This patch enables networking on e500 guests again.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-03 12:42:19 +02:00
Alexander Graf
be13cc7a35 PPC: Qdev'ify e500 pci
The e500 PCI controller isn't qdev'ified yet. This leads to severe issues
when running with -drive.

To be able to use a virtio disk with an e500 VM, let's convert the PCI
controller over to qdev.

Reviewed-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-05-12 00:24:52 +02:00
Alexander Graf
5389055a91 PPC MPC7544DS: Use new TLB helper function
Now that we have some nice helpers that can find us a TLB entry, let's
use that on the machine initialization code, so we don't need to know
about the internals of the TLB array.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-05-12 00:24:51 +02:00
Alexander Graf
3b989d499e PPC: Make MPC8544DS emulation work w/o KVM
The MPC8544DS board emulation was only used with KVM so far, so some
parts of the code didn't provide proper values for non-KVM execution.

This patch makes the machine work without KVM enabled. To actually use
this, you also need proper e500v2 MMU emulation.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-05-12 00:24:51 +02:00
Alexander Graf
ef250db6f1 PPC: Make MPC8544DS obey -cpu switch
The MPC8544DS board emulation code ignored the user defined -cpu switch.
This patch enables it to only provide a sane default, not force an e500v2
CPU inside.

Signed-off-by: Alexander Graf <agraf@suse.de>
2011-05-12 00:24:51 +02:00
Scott Wood
64a4d100b5 Don't call cpu_synchronize_state() from machine init.
This will deadlock when the I/O thread is used, since the
CPU thread is blocked waiting for qemu_system_ready.

The synchronization is unnecessary since this is before
cpu_synchronize_all_post_init().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-08 11:32:20 +02:00