Commit Graph

908 Commits

Author SHA1 Message Date
Jan Kiszka b139bd300f kvm: i386: Add services required for PCI device assignment
These helpers abstract the interaction of upcoming pci-assign with the
KVM kernel services. Put them under i386 only as other archs will
implement device pass-through via VFIO and not this classic interface.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-09-10 15:29:59 +03:00
Stefan Weil b834b5081d w32: Fix broken build
Commit ef8621b1a3 added an include
file which is not available for MinGW compilations.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-30 16:36:21 -05:00
Michael S. Tsirkin bc9a839d56 kvm: get/set PV EOI MSR
Support get/set of new PV EOI MSR, for migration.
Add an optional section for MSR value - send it
out in case MSR was changed from the default value (0).

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-29 10:51:28 -05:00
Anthony Liguori ef8621b1a3 target-i386: disable pv eoi to fix migration across QEMU versions
We have a problem with how we handle migration with KVM paravirt features.
We unconditionally enable paravirt features regardless of whether we know how
to migrate them.

We also don't tie paravirt features to specific machine types so an old QEMU on
a new kernel would expose features that never existed.

The 1.2 cycle is over and as things stand, migration is broken.  Michael has
another series that adds support for migrating PV EOI and attempts to make it
work correctly for different machine types.

After speaking with Michael on IRC, we agreed to take this patch plus 1 & 4
from his series.  This makes sure QEMU can migrate PV EOI if it's enabled, but
does not enable it by default.

This also means that we won't unconditionally enable new features for guests
future proofing us from this happening again in the future.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-29 10:51:20 -05:00
Matthew Ogilvie 5c73b757e3 target-i386/translate.c: mov to/from crN/drN: ignore mod bits
> This instruction is always treated as a register-to-register (MOD = 11)
> instruction, regardless of the encoding of the MOD field in the MODR/M
> byte.

Also, Microport UNIX System V/386 v 2.1 (ca 1987) runs fine on
real Intel 386 and 486 CPU's (at least), but does not run in qemu without
this patch.

Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net>
Signed-off-by: malc <av1474@comtv.ru>
2012-08-24 07:44:37 +04:00
Anthony Liguori 76b64a7aa8 win32: provide separate macros for weak decls and definitions
mingw32 seems to want the declaration to also carry the weak attribute.
Strangely, gcc on Linux absolutely does not want the declaration to be marked
as weak.  This may not be the right fix, but it seems to do the trick.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-15 13:26:03 -05:00
Blue Swirl 92fc4b586f x86: switch to AREG0 free mode
Add an explicit CPUX86State parameter instead of relying on AREG0.

Remove temporary wrappers and switch to AREG0 free mode.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:26 +00:00
Blue Swirl 2999a0b200 x86: avoid AREG0 in segmentation helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Rename remains of op_helper.c to seg_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:26 +00:00
Blue Swirl 4a7443be52 x86: avoid AREG0 for misc helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:26 +00:00
Blue Swirl 329e607d8e x86: use wrappers for memory access helpers
Switch to wrapped versions of memory access functions.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Blue Swirl 608badfc66 x86: avoid AREG0 for SMM helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Blue Swirl 052e80d5e0 x86: avoid AREG0 for SVM helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Blue Swirl 7923057bae x86: avoid AREG0 for integer helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Blue Swirl f0967a1add x86: avoid AREG0 for condition code helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Blue Swirl d3eb5eaeb5 x86: avoid AREG0 for FPU helpers
Make FPU helpers take a parameter for CPUState instead
of relying on global env.

Introduce temporary wrappers for FPU load and store ops. Remove
wrappers for non-AREG0 code. Don't call unconverted helpers
directly.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14 19:01:25 +00:00
Anthony Liguori 633decd711 Merge remote-tracking branch 'qmp/queue/qmp' into staging
* qmp/queue/qmp: (48 commits)
  target-ppc: add implementation of query-cpu-definitions (v2)
  target-i386: add implementation of query-cpu-definitions (v2)
  qapi: add query-cpu-definitions command (v2)
  compiler: add macro for GCC weak symbols
  qapi: add query-machines command
  qapi: mark QOM commands stable
  qmp: introduce device-list-properties command
  qmp: add SUSPEND_DISK event
  qmp: qmp-events.txt: add missing doc for the SUSPEND event
  qmp: qmp-events.txt: put events in alphabetical order
  qmp: emit the WAKEUP event when the guest is put to run
  qmp: don't emit the RESET event on wakeup from S3
  scripts: qapi-commands.py: qmp-commands.h: include qdict.h
  docs: writing-qmp-commands.txt: update error section
  error, qerror: drop QDict member
  qerror: drop qerror_table and qerror_format()
  error, qerror: pass desc string to error calls
  error: drop error_get_qobject()/error_set_qobject()
  qemu-ga: switch to the new error format on the wire
  qmp: switch to the new error format on the wire
  ...
2012-08-13 16:12:35 -05:00
Anthony Liguori e3966126d0 target-i386: add implementation of query-cpu-definitions (v2)
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-08-13 16:10:19 -03:00
Anthony Liguori d517872ec2 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  kvm: Add documentation comment for kvm_irqchip_in_kernel()
  kvm: Decouple 'GSI routing' from 'kernel irqchip'
  kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip'
  kvm: Decouple 'irqfds usable' from 'kernel irqchip'
  kvm: Move kvm_allows_irq0_override() to target-i386, fix return type
  kvm: Rename kvm_irqchip_set_irq() to kvm_set_irq()
  kvm: Decouple 'async interrupt delivery' from 'kernel irqchip'
  configure: Don't implicitly hardcode list of KVM architectures
  kvm: Check if smp_cpus exceeds max cpus supported by kvm
2012-08-13 09:25:48 -05:00
Blue Swirl d3da41e32b Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu:
  target-i386: move tcg initialization into x86_cpu_initfn()
  cleanup cpu_set_debug_excp_handler
  target-xtensa: drop usage of prev_debug_excp_handler
  target-i386: drop usage of prev_debug_excp_handler
2012-08-09 18:44:49 +00:00
Peter Maydell f3e1bed8da kvm: Decouple 'GSI routing' from 'kernel irqchip'
Don't assume having an in-kernel irqchip means that GSI
routing is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09 16:16:57 +03:00
Peter Maydell 614e41bc26 kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip'
Decouple another x86-specific assumption about what irqchips imply.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09 16:16:56 +03:00
Peter Maydell cc7e0ddf5a kvm: Decouple 'irqfds usable' from 'kernel irqchip'
Instead of assuming that we can use irqfds if and only if
kvm_irqchip_in_kernel(), add a bool to the KVMState which
indicates this, and is set only on x86 and only if the
irqchip is in the kernel.

The kernel documentation implies that the only thing
you need to use KVM_IRQFD is that KVM_CAP_IRQFD is
advertised, but this seems to be untrue. In particular
the kernel does not (alas) return a sensible error if you
try to set up an irqfd when you haven't created an irqchip.
If it did we could remove all this nonsense and let the
kernel return the error code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09 16:16:56 +03:00
Peter Maydell 1d31f66bbc kvm: Move kvm_allows_irq0_override() to target-i386, fix return type
kvm_allows_irq0_override() is a totally x86 specific concept:
move it to the target-specific source file where it belongs.
This means we need a new header file for the prototype:
kvm_i386.h, in line with the existing kvm_ppc.h.

While we are moving it, fix the return type to be 'bool' rather
than 'int'.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09 16:16:55 +03:00
Igor Mammedov 65dee38052 target-i386: move cpu_reset and reset callback to cpu.c
Moving reset callback into cpu object from board level and
resetting cpu at the end of x86_cpu_realize() will allow properly
create cpu object during run-time (hotplug) without calling reset externaly.

When reset over QOM hierarchy is implemented, reset callback
should be removed.

v2:
  - leave cpu_reset in pc_new_cpu() for now, it's to be cleaned up when APIC
    init is moved in cpu.c

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-01 08:45:06 -05:00
Igor Mammedov dd673288a8 target-i386: move cpu halted decision into x86_cpu_reset
MP initialization protocol differs between cpu families, and for P6 and
onward models it is up to CPU to decide if it will be BSP using this
protocol, so try to model this. However there is no point in implementing
MP initialization protocol in qemu. Thus first CPU is always marked as BSP.

This patch:
 - moves decision to designate BSP from board into cpu, making cpu
self-sufficient in this regard. Later it will allow to cleanup hw/pc.c
and remove cpu_reset and wrappers from there.
 - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior
described in Inted SDM vol 3a part 1 chapter 8.4.1
 - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu is BSP

patch is based on Jan Kiszka's proposal:
    http://thread.gmane.org/gmane.comp.emulators.qemu/100806

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-01 08:45:06 -05:00
Vitaly Chipounov 7162ab21fe x86: Fixed incorrect segment base address addition in 64-bits mode
According to the Intel manual
"Intel® 64 and IA-32 Architectures Software Developer’s Manual
Volume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode":

"When in compatibility mode, FS and GS overrides operate as defined by
32-bit mode behavior regardless of the value loaded into the upper 32
linear-address bits of the hidden descriptor register base field.
Compatibility mode ignores the upper 32 bits when calculating an effective address."

However, the code misses the 64-bit mode case, where an instruction with
address and segment size override would be translated incorrectly. For example,
inc dword ptr gs:260h[ebx*4] gets incorrectly translated to:

(uint32_t)(gs.base + ebx * 4 + 0x260)
instead of
gs.base + (uint32_t)(ebx * 4 + 0x260)

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-29 08:45:57 +00:00
Mao, Junjie 434acb817b Recognize PCID feature
This patch makes Qemu recognize the PCID feature specified from configuration or command line options.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-07-21 10:54:40 +01:00
Anthony Liguori 09f06a6c60 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  virtio: move common irqfd handling out of virtio-pci
  virtio: move common ioeventfd handling out of virtio-pci
  event_notifier: add event_notifier_set_handler
  memory: pass EventNotifier, not eventfd
  ivshmem: wrap ivshmem_del_eventfd loops with transaction
  ivshmem: use EventNotifier and memory API
  event_notifier: add event_notifier_init_fd
  event_notifier: remove event_notifier_test
  event_notifier: add event_notifier_set
  apic: Defer interrupt updates to VCPU thread
  apic: Reevaluate pending interrupts on LVT_LINT0 changes
  apic: Resolve potential endless loop around apic_update_irq
  kvm: expose tsc deadline timer feature to guest
  kvm_pv_eoi: add flag support
  kvm: Don't abort on kvm_irqchip_add_msi_route()
2012-07-18 14:44:43 -05:00
Jan Kiszka 5d62c43a17 apic: Defer interrupt updates to VCPU thread
KVM performs TPR raising asynchronously to QEMU, specifically outside
QEMU's global lock. When an interrupt is injected into the APIC and TPR
is checked to decide if this can be delivered, a stale TPR value may be
used, causing spurious interrupts in the end.

Fix this by deferring apic_update_irq to the context of the target VCPU.
We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it
is set, the VCPU calls apic_poll_irq before checking for further pending
interrupts. To avoid special-casing KVM, we also implement this logic
for TCG mode.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-10 11:31:09 +03:00
Peter Maydell bedc2ac1a7 target-i386: make it clearer that op table accesses don't overrun
Rephrase some of the expressions used to select an entry
in the SSE op table arrays so that it's clearer that they
don't overrun the op table array size.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:06:15 +00:00
Peter Maydell 96d7073fb0 target-i386: Remove confusing X86_64_DEF macro
The X86_64_DEF macro is a confusing way of making some terms
in a conditional only appear if TARGET_X86_64 is defined. We
only use it in two places, and in both cases this is for making
the same test, so abstract that check out into a function
where we can use a more conventional #ifdef.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:05:54 +00:00
Peter Maydell a87dacc89a target-i386: Remove unused macros
Commit 11f8cdb removed all the uses of the X86_64_ONLY
macro. The BUGGY_64() macro has been unused for a long time:
it originally marked some ops which couldn't be enabled
because of issues with the pre-TCG code generation scheme.
Remove the now-unnecessary definitions of both macros.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:05:45 +00:00
Stefan Weil 11f8cdbc64 target-i386: Fix compilation with --enable-debug
commit c4baa0503d improved SSE table
type safety which now raises compiler errors when latest QEMU was
configured with --enable-debug.

Fix this by splitting the SSE tables even further to separate
helper functions with different signatures.

Instead of crashing by calling address 0, the code now jumps to
label illegal_op.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-05 18:55:57 +00:00
Liu, Jinsong a75b3e0f64 kvm: expose tsc deadline timer feature to guest
This patch exposes tsc deadline timer feature to guest if
1). in-kernel irqchip is used, and
2). kvm has emulated tsc deadline timer, and
3). user authorize the feature exposing via -cpu or +/- tsc-deadline

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-07-03 17:36:32 -03:00
Michael S. Tsirkin bfee7546df kvm_pv_eoi: add flag support
Support the new PV EOI flag in kvm - it recently got merged
into kvm.git. Set by default with -cpu kvm.
Set for -cpu qemu by adding +kvm_pv_eoi.
Clear by adding -kvm_pv_eoi to -cpu option.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-07-03 16:57:20 -03:00
Blue Swirl 9cc85c281b x86: rename op_helper.c to seg_helper.c
Rename what is remaining of op_helper.c to seg_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl 10774999ca x86: split off memory access helpers
Move memory access helpers to mem_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl f7b2429f52 x86: split off misc helpers
Move various functions to misc_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl ab109e5947 x86: split off SMM helpers
Move SMM helpers to smm_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl 6bada5e80e x86: split off SVM helpers
Move SVM helpers to svm_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl d758207801 x86: split off integer helpers
Move integer and bit field helpers to int_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 5918fffb1d x86: split off condition code helpers
Move condition code helpers to cc_helper.c.

Move the shared inline functions lshift(), cpu_load_eflags() and
cpu_cc_compute_all() to cpu.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 997ff0d9a9 x86: prepare eflags helpers for general use
Adjust function names and add an explicit CPUX86State
parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 38de4c46f2 x86: split condition code and shift templates
Move shift templates from helper_template.h to
shift_helper_template.h and the condition code helpers
to cc_helper_template.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl a04759f6ae x86: fix coding style in helper_template.h
Fix coding style in helper_template.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl c4baa0503d x86: improve SSE table type safety
SSE function tables could easily be corrupted because of use
of void pointers.

Introduce function pointer types and helper variables in order
to improve type safety.

Split sse_op_table3 according to types used.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl f299f4374a x86: split off FPU helpers
Move FPU and MMX/SSE helpers to fpu_helpers.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl e01d9d31d9 x86: fix coding style in ops_sse.h
Fix coding style in ops_sse.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 9dd69d65aa x86: avoid an extern declaration
After the previous patch, we can use the proper
declaration in a common header file.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 599b9a5a51 x86: split off exception handlers
Move exception handlers from op_helper.c to excp_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00