Commit Graph

49437 Commits

Author SHA1 Message Date
Max Reitz
f84d431b86 block/nbd: Use SocketAddress options
Drop the use of legacy options in favor of the SocketAddress
representation, even for internal use (i.e. for storing the result of
the filename parsing).

Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
491d6c7c4e block/nbd: Accept SocketAddress
Add a new option "server" to the NBD block driver which accepts a
SocketAddress.

"path", "host" and "port" are still supported as legacy options and are
mapped to their corresponding SocketAddress representation.

Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
48c38e0b8d block/nbd: Add nbd_has_filename_options_conflict()
Right now, we have four possible options that conflict with specifying
an NBD filename, and a future patch will add another one ("address").
This future option is a nested QDict that is flattened at this point,
requiring us to test each option whether its key has an "address."
prefix. Therefore, we will then need to iterate through all options
(including the "export" option which was not covered so far).

Adding this iteration logic now will simplify adding the new option
later. A nice side effect is that the user will not receive a long list
of five options which are not supposed to be specified with a filename,
but we can actually print the problematic option.

Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
fcfcd8ffcc block/nbd: Use qdict_put()
Instead of inlining this nice macro (i.e. resorting to
qdict_put_obj(..., QOBJECT(...))), use it.

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
7edca33804 block/nbd: Default port in nbd_refresh_filename()
Instead of not emitting the port in nbd_refresh_filename(), just set it
to the default if the user did not specify it. This makes the logic a
bit simpler.

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
442045cbce block/nbd: Reject port parameter without host
Currently, a port that is passed along with a UNIX socket path is
silently ignored. That is not exactly ideal, it should be an error
instead.

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Max Reitz
82d73014a9 block/nbd: Drop trailing "." in error messages
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
e5b77eec91 qemu-iotests: Fix typo for NFS with IMGOPTSSYNTAX
Commit 076003f5 added configuration for NFS with IMGOPTSSYNTAX enabled,
but it didn't use the right variable name: $TEST_DIR_OPTS doesn't exist.
This fixes the mistake.

However, this doesn't make anything work that was broken before: The
only way to get IMGOPTSSYNTAX is with -luks, but the combination of
-luks and -nfs doesn't get qemu-img create commands right (because
qemu-img create doesn't support --image-opts yet), so even after this
fix some more work would be required to make the tests pass.

Reported-by: Tomáš Golembiovský <tgolembi@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
cbc14ac9c3 block: Remove bdrv_aio_ioctl()
It is unused now.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
151a2930c4 raw: Implement .bdrv_co_ioctl instead of .bdrv_aio_ioctl
It's the simpler interface to use for the raw format driver.

Apart from that, this removes the last user of the AIO emulation
implemented by bdrv_aio_ioctl().

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
16a389dc9e block: Introduce .bdrv_co_ioctl() driver callback
This allows drivers to implement ioctls in a coroutine-based way.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
61b2450414 block: Remove bdrv_ioctl()
It is unused now.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
0d4377b3ea raw-posix: Don't use bdrv_ioctl()
Instead of letting raw-posix use the bdrv_ioctl() abstraction to issue
an ioctl to itself, just call ioctl() directly.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:23 +02:00
Kevin Wolf
48af776a5b block: Use blk_co_ioctl() for all BB level ioctls
All read/write functions already have a single coroutine-based function
on the BlockBackend level through which all requests go (no matter what
API style the external caller used) and which passes the requests down
to the block node level.

This patch exports a bdrv_co_ioctl() function and uses it to extend this
mode of operation to ioctls.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:22 +02:00
Kevin Wolf
7381e95cc2 block: Remove bdrv_aio_pdiscard()
It is unused now.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:22 +02:00
Kevin Wolf
8c2e3dd55f block: Use blk_co_pdiscard() for all BB level discard
All read/write functions already have a single coroutine-based function
on the BlockBackend level through which all requests go (no matter what
API style the external caller used) and which passes the requests down
to the block node level.

This patch extends this mode of operation to discards.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:22 +02:00
Kevin Wolf
be07a88981 block: Use blk_co_flush() for all BB level flushes
All read/write functions already have a single coroutine-based function
on the BlockBackend level through which all requests go (no matter what
API style the external caller used) and which passes the requests down
to the block node level.

This patch extends this mode of operation to flushes.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2016-10-27 19:05:22 +02:00
Peter Maydell
835f3d24b4 audio: intel-hda: check stream entry count during transfer
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABAgAGBQJYEg+bAAoJEEy22O7T6HE42V8QALHC42lwtj9Kx4yHS7Tpn4Jy
 ry62EjYvXb/BCd1GGkzCZhPPJSdpiwFRubmm00hwHPzQdYjj32CYfQvAFaLpcRlY
 u1Xp2G1YIlIrhhTwjEeYglBQkuLkjqh2g90kWarvw/Ry6iS9WEtrC8GwpbVnHa6/
 fAkAJV5KKUmXwKFVdhDZvhpOVf055U88EAoSz7H6P1opKcv/vruCs/wId3bl9LH0
 pmdhXnneJmriNWqoqmfEDAHGi37QS1GL2Zhfqs3H/dOfe5WTabYwFNd5fsz+PeyE
 SojgzdcTPpeBk25JwFjerx/aesu4uNU8GnUBqvDyVLERpHK4MVvAWToJJN5ruUGQ
 m+LYcCcbTIDUjVmvLCASjlJKoztv+iG4CCiFerCHg1tVBiPNMpZtdbkXnj61Vc77
 2r9P1sMkn+0KQ6bqoFw1A2Iz/DbL9faw935OQsGRpcLEHWq7laImSFM8qeUEARD2
 mpqi8vexIFdb40bW8kQ1IUuTcqrOhbABf7cw/aLGIQGhjH1MSTgAUtRz16erlwz3
 zmp3lJne06NWnqti0gepYo6QjVgYsAFcSySvlVgh7fo4lcp+aKaD1QasOnIIJHYY
 9hYXjgM5xd3E0k4O0NoJF1HpkuMDI/V+GXbhbog5ZUVlN7KDTSCLPXn45nsWNOva
 ttaXt0Fpc2Btwta/Wtkw
 =QEV8
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20161027-1' into staging

audio: intel-hda: check stream entry count during transfer

# gpg: Signature made Thu 27 Oct 2016 15:30:51 BST
# gpg:                using RSA key 0x4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/pull-audio-20161027-1:
  audio: intel-hda: check stream entry count during transfer

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-27 17:24:29 +01:00
Gerd Hoffmann
6e99f5741f seabios: update to 1.10.0 release.
New in this release:
===================

* Initial support for Trusted Platform Module (TPM) version 2.0
* Several USB XHCI timing fixes on real hardware
* Support for "LSI MPT Fusion" scsi controllers on QEMU
* Support for virtio devices mapped above 4GB
* Several bug fixes and code cleanups

git shortlog rel-1.9.3..rel-1.10.0
==================================

Alex Williamson (1):
      fw/pci: Add support for mapping Intel IGD via QEMU

Cao jin (1):
      Fix comment typo

Cole Robinson (1):
      biostables: Support SMBIOS 2.6+ UUID format

Dana Rubin (2):
      pvscsi: Fix incorrect arguments order in call to memalign_low
      pvscsi: Use high memory for rings

Don Slutz (1):
      Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

Gerd Hoffmann (4):
      ahci: set transfer mode according to the capabilities of connected drive
      virtio: uninline _vp_{read,write}
      virtio: pci cfg access
      virtio: fix virtio-pci

Haozhong Zhang (1):
      fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

Igor Mammedov (3):
      paravirt: disable legacy bios tables in case of more than 255 CPUs
      add helpers to read etc/boot-cpus at resume time
      support booting with more than 255 CPUs

Kevin O'Connor (124):
      usb: Allow configuration of sigatt time (in etc/usb-time-sigatt)
      xhci: Check for device disconnects during USB2 reset polling
      sdcard: Only enable error_irq_enable for bits defined in SDHCI v1 spec
      sdcard: fix typo causing 32bit write to 16bit block_size field
      sdcard: Enable extra debugging on sdcard_waitw() timeout
      acpi_extract: Move main code to new function main()
      acpi_extract: Make the generated .hex files more human readable
      acpi_extract: Don't generate unused (and empty) q35-acpi-dsdt.hex file
      acpi: Don't build SSDT files on every build; store them in git
      acpi: Remove build check for iasl
      tpm: Move standard definitions from tcgbios.h to new file std/tcg.h
      util.h: Minor - HaveRunPost is in misc.c not resume.c
      tpm: Add "static" declaration to functions not used outside tcgbios.c
      tpm: Move code around in tcgbios.c
      tpm: Move error recovery from tpm_extend_acpi_log() to only caller
      tpm: Open code tpm_ipl() into callers
      tpm: Change tpm_add_measurement() to tpm_add_action()
      tpm: Move tpm_add_bootdevice() into callers
      tpm: Move tpm_start_option_rom_scan() and tpm_calling_int19h() into callers
      tpm: pcpes->event is a variable length array
      tpm: Don't pass entry_count around in parameters to/from tpm_extend_acpi_log()
      tpm: There is no need to pass pcrindex to hash_log_extend_event()
      tpm: Perform hashing separately from logging
      tpm: There is no need to pass event_length to hash/extend functions
      tpm: Avoid scatter-gather copying in build_and_send_cmd()
      tpm: Don't implement scatter-gather in transmit()
      tpm: Merge tpm_log_event() and tpm_extend_acpi_log()
      tpm: Merge tpm_log_extend_event() and tpm_extend(); extend before logging
      xhci: Wait for port enable even for USB3 devices
      xhci: Improve port status change debugging
      xhci: Disable slot on failed set_address command
      nmi: Don't try to switch onto extra stack in NMI handler
      scsi: Do not call printf() from scsi_is_ready()
      block: Report drive->sectors using "%u" instead of "%d"
      tpm: Add banner separating the TCG bios interface code from TCG menu code
      tpm: Avoid macro expansion of tpm request / response structs
      tpm: Simplify hardware probe and detection checks
      tpm: Add wrapper function tpmhw_set_timeouts()
      tpm: Move TPM hardware functions from tcgbios.c to hw/tpm_drivers.c
      tpm: Rework TPM interface shutdown support
      tpm: Simplify tcpa probe
      tpm: Introduce tpm_get_capability() helper function
      tpm: Eliminate response buffer parameter from build_and_send_cmd()
      tpm: Don't return a status from external bios measurement functions
      tpm: No need to check the return status of measurements
      tpm: Don't call tpm_set_failure() from tpm_log_extend_event()
      tpm: Don't use 16bit BIOS return codes in build_and_send_cmd()
      tpm: Don't use 16bit BIOS return codes in tpm_log_event()
      tpm: Don't use 16bit BIOS return codes in tpmhw_* functions
      tpm: Don't use 16bit BIOS return codes in TPM menu functions
      usb: Remove usbdev->slotid field
      coreboot: Check for unaligned cbfs header
      resume: Make KVM soft reboot loop detection more flexible
      post: Always set HaveRunPost prior to setting any other global variable
      kbd: Don't treat scancode and asciicode as separate values
      kbd: Refactor capslock and numlock handling
      ehci: Only delay UHCI/OHCI port scan until after EHCI setup completes
      usb: Eliminate USB controller setup thread
      pci: Add helper functions for internal driver BAR handling
      ahci: Convert to new PCI BAR helper functions
      ata: Convert to new PCI BAR helper functions
      esp-scsi: Convert to new PCI BAR helper functions
      lsi-scsi: Convert to new PCI BAR helper functions
      megasas: Convert to new PCI BAR helper functions
      pvscsi: Convert to new PCI BAR helper functions
      sdcard: Convert to new PCI BAR helper functions
      ehci: Convert to new PCI BAR helper functions
      ohci: Convert to new PCI BAR helper functions
      uhci: Convert to new PCI BAR helper functions
      xhci: Convert to new PCI BAR helper functions
      virtio: Convert to new PCI BAR helper functions
      pci: Consistently set pci->have_drivers for devices with internal drivers
      pci: Implement '%pP' printf handler for 'struct pci_device' pointers
      pci: Move code in pci.c that is specific to pciinit.c to pciinit.c
      pci: Split low-level pci code from higher-level 'struct pci_device' code
      scsi: Always use MAXDESCSIZE when building drive description
      block: Move drive setup to new function block_setup()
      tpm: Unify tpm_fill_hash()/tpm_log_extend_event() and use in BIOS interface
      docs: Note release date of 1.9.1
      build: fix .text section address alignment
      tpm: Write logs in TPM 2 format
      mpt-scsi: Declare 'int i' outside of for loop for older compilers
      block: Move send_disk_op() from block.c to disk.c
      disk: Avoid stack_hop() path if already on the extra stack
      optionroms: Drop support for CONFIG_OPTIONROMS_DEPLOYED
      shadow: Batch PCI config writes
      virtio: Use threads when scanning for virtio devices
      scsi: Launch a thread when scanning for drives in the scsi drivers
      docs: Note release date of 1.9.2
      usb-xhci: Remove unused const variables
      tcgbios: Remove unused const variable
      vgabios: Remove special case of dh==0xff in handle_1013()
      vgabios: Don't check for special case of page==0xff on external calls
      vgabios: Simplify set_cursor_pos()
      docs: Note release date of 1.9.3
      vgabios: Simplify scroll logic
      blockcmd: CMD_SCSI op is only used in 32bit mode
      swcursor: Move swcursor code from vgafb.c to new file swcursor.c
      swcursor: Concentrate swcursor logic in swcursor.c
      vgafb: Move header definitions from vgabios.h to new file vgafb.h
      vgainit: Move video param setup to stdvga_build_video_param()
      vgautil: Add new header file with misc function and variable definitions
      vgautil: Move generic definitions from stdvga.h to vgautil.h
      vgautil: Move definitions from cbvga.h and clext.h to vgautil.h
      version: Update header files now that version.c is not auto generated
      checkstack: Handle conditional checks at start of functions
      tpm: Append to TPM2 log the hashes used for PCR extension
      ps2: Remove stale check for timeout warning on reset
      pic: The default hardware interrupt handlers should not take a parameter
      kbd: Implement 101-key keyboard keycode mapping
      kbd: Implement extended keycode mappings for keypad-enter and keypad-/
      kbd: Suppress keys without mappings
      kbd: Merge bda->kbd_flag0 and bda->kbd_flag1
      kbd: Extract out shift flag setting into new function
      kbd: Move checking for special keys in __process_keys() into switch
      kbd: Ignore fake shift keys
      usb-hid: Generate Ctrl+Break and Alt+SysReq keys
      kbd: Generate interrupt events for SysReq, PrtScr, and Break
      post: Map int 0x05 to entry point
      kbd: Move extended and release events out of special key detection switch
      build: Be sure to also include out/*.d in Makefile
      smp: consolidate CPU APIC ID detection and accounting
      build: Add -fno-pie to the gcc flags when available
      docs: Note v1.10.0 release

Marcel Apfelbaum (2):
      fw/pci: do not automatically allocate IO region for PCIe bridges
      fw/pci: add Q35 S3 support

Matt DeVillier (1):
      sdcard: skip detection of PCI sdhci controllers if etc/sdcard used

Paolo Bonzini (1):
      smp: restore MSRs on S3 resume

Piotr Król (1):
      docs: fix various typos and inconsistency

Roger Pau Monne (1):
      build: fix typo in buildversion.py

Stefan Berger (34):
      tpm: Temporarily deactivate the TPM in case of failure
      tpm: Refactor function building TPM commands
      tpm: Refactor the parameters being passed to tpm_extend_acpi_log
      tpm: Refactor hash_log_event BIOS interface function
      tpm: Refactor hash_log_extend_event
      tpm: fix compiler warning with older gcc versions
      tpm: Drop code using the TPM for sha1
      tpm: Set timeouts and durations to microsecond values
      tpm: Cache all log related pointers in tpm_state
      tpm: Refactor pass_through_to_tpm
      tpm: Rename remaining interrupt functions
      tpm: Remove check for working TPM from TPM interrupt handler
      tpm: Check length parameter of the array
      tpm: Add a menu for TPM configuration
      tpm: Copy digest into HashLogExentEvent response
      tpm: Move assert_physical_presence and dependencies
      tpm: Add support for harware physical presence
      tpm: Rework the assertion of physical presence
      tpm: Remove usage of PP_CMD_ENABLE from all but one place
      tpm: Do not set TPM in failure mode if menu command fails
      tpm: Extend TPM TIS with TPM 2 support.
      tpm: Factor out tpm_extend
      tpm: Prepare code for TPM 2 functions
      tpm: Implement tpm20_startup and tpm20_s3_resume
      tpm: Implement tpm20_set_timeouts
      tpm: Implement tpm20_prepboot
      tpm: Implement tpm20_extend
      tpm: Implement tpm20_menu
      tpm: Implement TPM 2's tpm_set_failure part
      tpm: Filter TPM commands in passthrough API
      tpm: Retrieve the PCR Bank configuration
      tpm: Restructure tpm20_extend to use buffer and take hash as parameter
      tpm: Refactor tpml_digest_values_sha1 structure
      tpm: Extend tpm20_extend to support extending to multiple PCR banks

Zheng Bao (1):
      splash: Skip the RGB555 mode

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-10-27 16:42:28 +02:00
Peter Maydell
5929d7e8a0 cmpxchg emulation of atomics, v8
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJYEMv7AAoJEK0ScMxN0CebtzsIAJD3n9AlCnJoC0xVJDcacqlY
 nkUqJqgmV5FkXq+x8KA6t7G5jfxZTBxk6QY42nXBidfuquogXnk0TQ0LJxLqp316
 mbjdomF8NHZH/79wMg5cYP/Thu4FAtw4uqJbb7kUKPjvQiPJhkISAl/4Jg9y07WR
 n6KptKI09QpIs6cM8q9DQ+RXoYG/xg/hP3Wih5TL4N1hZSiJG78Mpr5nF2HgbFrs
 gKRCmUzNkrG/hBweOqWDRo3H/fHvxFUDMNOzceH7gl1OvANaXaIO2lMkEI3MleFF
 Jq5pEtJ4TefIeoqCw8Nd5WZyzqZPUucqlXWwz3TLP0x3AgzkTH4F5lWlumqb+WM=
 =jEq6
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-atomic-20161026' into staging

cmpxchg emulation of atomics, v8

# gpg: Signature made Wed 26 Oct 2016 16:30:03 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-atomic-20161026: (37 commits)
  target-alpha: Emulate LL/SC using cmpxchg helpers
  target-alpha: Introduce MMU_PHYS_IDX
  target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}
  linux-user: remove handling of aarch64's EXCP_STREX
  linux-user: remove handling of ARM's EXCP_STREX
  target-arm: emulate aarch64's LL/SC using cmpxchg helpers
  target-arm: emulate SWP with atomic_xchg helper
  target-arm: emulate LL/SC using cmpxchg helpers
  target-arm: Rearrange aa32 load and store functions
  tests: add atomic_add-bench
  target-i386: remove helper_lock()
  target-i386: emulate XCHG using atomic helper
  target-i386: emulate LOCK'ed BTX ops using atomic helpers
  target-i386: emulate LOCK'ed XADD using atomic helper
  target-i386: emulate LOCK'ed NEG using cmpxchg helper
  target-i386: emulate LOCK'ed NOT using atomic helper
  target-i386: emulate LOCK'ed INC using atomic helper
  target-i386: emulate LOCK'ed OP instructions using atomic helpers
  target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers
  tcg: Emit barriers with parallel_cpus
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-27 14:06:34 +01:00
Peter Maydell
8f9d84df97 -----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
 
 iQEcBAABAgAGBQJYEBKaAAoJEO8Ells5jWIR4jQH/3HgiWHs9+iQrUjo8DXrbF1b
 Dkdg8B66yYRirwR4KeCVJqOMnscPotISJc47MveoU+CxAwRcmhVtPuH+gZ7MLggp
 IrFT9XNo4WhSBlOc1tr/qGyGGgzzkWbcKKBfD3dK049XDcXPm7A3hNshqitf6YJI
 ILnlVk0ttKP7PKd6pvwaH+8yNDqcCr4+Rk6uSgOAB4N416+N/zk2AwQGWbMgLSzZ
 zBRu95K/7UvRRoyyqR4kxTRGhfNdEqWeOXXISRmTBfBM+iK6W3uaeWSy5ka9QTdo
 yXwcwxVe9iBxMuR3sZqNAbi5EbQIBtQSI2echG4bCQwvwjEAw9LUOhnJ44XkTfE=
 =GoQg
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging

# gpg: Signature made Wed 26 Oct 2016 03:19:06 BST
# gpg:                using RSA key 0xEF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 215D 46F4 8246 689E C77F  3562 EF04 965B 398D 6211

* remotes/jasowang/tags/net-pull-request:
  colo-proxy: fix memory leak
  net: rtl8139: limit processing of ring descriptors
  net: vmxnet: initialise local tx descriptor
  e1000e: Don't zero out buffer address in rx descriptor
  net: rocker: set limit to DMA buffer size
  net: eepro100: fix memory leak in device uninit
  tap-bsd: OpenBSD uses tap(4) now
  net: pcnet: fix source formatting and indentation
  net: pcnet: check rx/tx descriptor ring length

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-27 12:45:45 +01:00
Peter Maydell
991a97ac74 -----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJYD6tmAAoJEPMMOL0/L748ebQQAKxA2zQn2TPWoy/hzAC+QQIt
 VVKm3so/4WwX1JVrfLm9jAVHBsOYvHgABSxHtdwRQK2UD6QP3zh8dZNFIAJgNtGH
 SNMRm2HRyE7f16hnbz5Scqp7YGvYDp8XVolNvS/o5bBh3dS9j4V4W4DiC3bu7OZY
 FNytzlFCQvhOXNRejhlKsusYvrRECEy5Zaa3LTbYRVX7K/sHtDCD01URQKYJWZFJ
 m13juuus1rXNVuYxbs1YLwAJcN9yM4pjnZnO6meBH669+/JSbByjjXuhARwng4Z5
 o/f8+ZpyCMlNXMTt7DFu6QPxrFKCHpQ2Rwyy55uVx7lEmtZ1s6n6mF+P/Wp+kXUZ
 QzvbBSKCnNsLHGUf+0Us/U1v61WFhd4MZJF7dzWecVpLT8tCbXADFLbfgzFkz5MN
 zVd7L2uO4F3CtkwW8GFxmiVqmnHyOl/+2kz8UkejbnJQxwmr8oijVQVexaXDKHCA
 KytAz+PEW5qX6uGlfnEV2DnBpNOAzh8RspZF/mzDA5H0VM08bmeK7ySUe+BYRv2p
 GZXqdVchQrf2fYmFB1Dn4hGvc/gxtLjxkFst3koItgGeUauY35AAkDZ2B5EJ03UZ
 kpfA0grwhWTX92h+MYwXRHYaMoscCQPcjfYNbDGcOSvvwkElOf+fFMTaA9t0MGF2
 gREdnWwhl8gr7K/Mh+3t
 =uyQH
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-part1-pull-request' into staging

# gpg: Signature made Tue 25 Oct 2016 19:58:46 BST
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-part1-pull-request: (23 commits)
  target-m68k: Optimize gen_flush_flags
  target-m68k: Optimize some comparisons
  target-m68k: Use setcond for scc
  target-m68k: Introduce DisasCompare
  target-m68k: Reorg flags handling
  target-m68k: Remove incorrect clearing of cc_x
  target-m68k: Some fixes to SR and flags management
  target-m68k: Print flags properly
  target-m68k: update CPU flags management
  target-m68k: don't update cc_dest in helpers
  target-m68k: update move to/from ccr/sr
  target-m68k: remove m68k_cpu_exec_enter() and m68k_cpu_exec_exit()
  target-m68k: Replace helper_xflag_lt with setcond
  target-m68k: allow to update flags with operation on words and bytes
  target-m68k: REG() macro cleanup
  target-m68k: set PAGE_BITS to 12 for m68k
  target-m68k: define operand sizes
  target-m68k: set disassembler mode to 680x0 or coldfire
  target-m68k: introduce read_imXX() functions
  target-m68k: manage scaled index
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-27 11:58:43 +01:00
Daniel P. Berrange
c3ff757d25 main: set names for main loop sources created
The main loop creates two generic sources for the AIO
and IO handler systems.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:11 +02:00
Daniel P. Berrange
10bcfe5897 vnc: set name for all I/O channels created
Ensure that all I/O channels created for VNC are given names
to distinguish their respective roles.

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Daniel P. Berrange
6f01f136af migration: set name for all I/O channels created
Ensure that all I/O channels created for migration are given names
to distinguish their respective roles.

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Daniel P. Berrange
e93a68e102 char: set name for all I/O channels created
Ensure that all I/O channels created for character devices
are given names to distinguish their respective roles.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Daniel P. Berrange
0d73f7253e nbd: set name for all I/O channels created
Ensure that all I/O channels created for NBD are given names
to distinguish their respective roles.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Daniel P. Berrange
20f4aa265e io: add ability to set a name for IO channels
The GSource object has ability to have a name, which is useful
when debugging performance problems with the mainloop event
callbacks that take too long. By associating a name with a
QIOChannel object, we can then set the name on any GSource
associated with the channel.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Felipe Franciosi
af8096b2c3 io: Add a QIOChannelSocket cleanup test
This patch adds a test to verify that the QIOChannel framework will not
unlink a filesystem unix socket unless the _FEATURE_LISTEN bit is set.

Due to a bug introduced in 74b6ce43, the framework would unlink the
entry if the _FEATURE_SHUTDOWN bit was set, regardless of the presence
of _FEATURE_LISTEN.

Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:10 +02:00
Daniel P. Berrange
bf53520827 io: set LISTEN flag explicitly for listen sockets
The SO_ACCEPTCONN ioctl is not portable across OS, with
some BSD versions and OS-X not supporting it. There is
no viable alternative to this, so instead just set the
feature explicitly when creating a listener socket.

The current users of qio_channel_socket_new_fd() won't
ever be given a listening socket, so there's no problem
with no auto-detecting it in this scenario

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-27 09:13:00 +02:00
Felipe Franciosi
d8d3c7cc67 io: Introduce a qio_channel_set_feature() helper
Testing QIOChannel feature support can be done with a helper called
qio_channel_has_feature(). Setting feature support, however, was
done manually with a logical OR. This patch introduces a new helper
called qio_channel_set_feature() and makes use of it where applicable.

Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-26 18:19:53 +02:00
Felipe Franciosi
e413ae0c04 io: Use qio_channel_has_feature() where applicable
Parts of the code have been testing QIOChannel features directly with a
logical AND. This patch makes it all consistent by using the
qio_channel_has_feature() function to test if a feature is present.

Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-26 18:19:53 +02:00
Felipe Franciosi
8fbf661212 io: Fix double shift usages on QIOChannel features
When QIOChannels were introduced in 666a3af9, the feature bits were
already defined shifted. However, when using them, the code was shifting
them again. The incorrect use was consistent until 74b6ce43, where
QIO_CHANNEL_FEATURE_LISTEN was defined shifted but tested unshifted.

This patch changes the definition to be unshifted and fixes the
incorrect usage introduced on 74b6ce43.

Signed-off-by: Felipe Franciosi <felipe@nutanix.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-26 18:19:53 +02:00
Richard Henderson
ed2839166c target-alpha: Emulate LL/SC using cmpxchg helpers
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem.  However, portable parallel
code is written assuming only cmpxchg which means that in
practice this is a viable alternative.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Richard Henderson
6a73ecf5cf target-alpha: Introduce MMU_PHYS_IDX
Rather than using helpers for physical accesses, use a mmu index.
The primary cleanup is with store-conditional on physical addresses.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
05188cc72f target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}
The exception is not emitted anymore; remove it and the associated
TCG variables.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1467054136-10430-31-git-send-email-cota@braap.org>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
f4e6eb7ffe linux-user: remove handling of aarch64's EXCP_STREX
The exception is not emitted anymore.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1467054136-10430-30-git-send-email-cota@braap.org>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
b50b82fc48 linux-user: remove handling of ARM's EXCP_STREX
The exception is not emitted anymore.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twidle.net>
Message-Id: <1467054136-10430-29-git-send-email-cota@braap.org>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
1dd089d0ee target-arm: emulate aarch64's LL/SC using cmpxchg helpers
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem. Portable parallel code, however,
is written assuming only cmpxchg--and not LL/SC--is available.
This means that in practice emulating LL/SC with cmpxchg is
a viable alternative.

The appended emulates LL/SC pairs in aarch64 with cmpxchg helpers.
This works in both user and system mode. In usermode, it avoids
pausing all other CPUs to perform the LL/SC pair. The subsequent
performance and scalability improvement is significant, as the
plots below show. They plot the throughput of atomic_add-bench
compiled for ARM and executed on a 64-core x86 machine.

Hi-res plots: http://imgur.com/a/JVc8Y

                atomic_add-bench: 1000000 ops/thread, [0,1] range

  18 ++---------+----------+---------+----------+----------+----------+---++
     +cmpxchg +-E--+       +         +          +          +          +    |
  16 ++master +-H--+                                                      ++
     ||                                                                    |
  14 ++                                                                   ++
     | |                                                                   |
  12 ++|                                                                  ++
     | |                                                                   |
  10 ++++                                                                 ++
   8 ++E                                                                  ++
     |+++                                                                  |
   6 ++ |                                                                 ++
     |  |                                                                  |
   4 ++ |                                                                 ++
     |   |                                                                 |
   2 +H++E+---                                                            ++
     + |     +E++----+E+---+--+E+----++E+------+E+------+E++----+E+---+--+E|
   0 ++H-H----H-+-----H----+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

                atomic_add-bench: 1000000 ops/thread, [0,2] range

  18 ++---------+----------+---------+----------+----------+----------+---++
     +cmpxchg +-E--+       +         +          +          +          +    |
  16 ++master +-H--+                                                      ++
     | |                                                                   |
  14 ++E                                                                  ++
     | |                                                                   |
  12 ++|                                                                  ++
     |+++                                                                  |
  10 ++ |                                                                 ++
   8 ++ |                                                                 ++
     |  |                                                                  |
   6 ++ |                                                                 ++
     |   |                                                                 |
   4 ++  |                                                                ++
     |  +E+---                                                             |
   2 +H+     +E+-----+++              +++      +++   ---+E+-----+E+------+++
     +++        +    +E+---+--+E+----++E+------+E+---   ++++    +++   +  +E|
   0 ++H-H----H-+-----H----+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

               atomic_add-bench: 1000000 ops/thread, [0,128] range

  70 ++---------+----------+---------+----------+----------+----------+---++
     +cmpxchg +-E--+       +         +          +          +          +    |
  60 ++master +-H--+                  +++            ---+E+-----+E+------+E+
     |                        +E+------E-------+E+---                      |
     |                     ---        +++                                  |
  50 ++              +++---                                               ++
     |              -+E+                                                   |
  40 ++      +++----                                                      ++
     |        E-                                                           |
     |      --|                                                            |
  30 ++   -- +++                                                          ++
     |  +E+                                                                |
  20 ++E+                                                                 ++
     |E+                                                                   |
     |                                                                     |
  10 ++                                                                   ++
     +          +          +         +          +          +          +    |
   0 +HH-H----H-+-----H----+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

              atomic_add-bench: 1000000 ops/thread, [0,1024] range

  160 ++---------+---------+----------+---------+----------+----------+---++
      +cmpxchg +-E--+      +          +         +          +          +    |
  140 ++master +-H--+                                           +++      +++
      |                                                -+E+-----+E+-------E|
  120 ++                                       +++ ----                  +++
      |                                +++  ----E--                        |
  100 ++                              --E---   +++                        ++
      |                       +++ ---- +++                                 |
   80 ++                     --E--                                        ++
      |                  ---- +++                                          |
      |              -+E+                                                  |
   60 ++         ---- +++                                                 ++
      |      +E+-                                                          |
   40 ++   --                                                             ++
      |  +E+                                                               |
   20 +EE+                                                                ++
      +++        +         +          +         +          +          +    |
    0 +HH-H---H--+-----H---+----------+---------+----------+----------+---++
      0          10        20         30        40         50         60
                                Number of threads

[rth: Rearrange 128-bit cmpxchg helper.  Enforce alignment on LL.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-28-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
cf12bce088 target-arm: emulate SWP with atomic_xchg helper
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-25-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
354161b37c target-arm: emulate LL/SC using cmpxchg helpers
Emulating LL/SC with cmpxchg is not correct, since it can
suffer from the ABA problem. Portable parallel code, however,
is written assuming only cmpxchg--and not LL/SC--is available.
This means that in practice emulating LL/SC with cmpxchg is
a viable alternative.

The appended emulates LL/SC pairs in ARM with cmpxchg helpers.
This works in both user and system mode. In usermode, it avoids
pausing all other CPUs to perform the LL/SC pair. The subsequent
performance and scalability improvement is significant, as the
plots below show. They plot the throughput of atomic_add-bench
compiled for ARM and executed on a 64-core x86 machine.

Hi-res plots: http://imgur.com/a/aNQpB

               atomic_add-bench: 1000000 ops/thread, [0,1] range

  9 ++---------+----------+----------+----------+----------+----------+---++
    +cmpxchg +-E--+       +          +          +          +          +    |
  8 +Emaster +-H--+                                                       ++
    | |                                                                    |
  7 ++E                                                                   ++
    | |                                                                    |
  6 ++++                                                                  ++
    |  |                                                                   |
  5 ++ |                                                                  ++
  4 ++ |                                                                  ++
    |  |                                                                   |
  3 ++ |                                                                  ++
    |   |                                                                  |
  2 ++  |                                                                 ++
    |H++E+---                                  +++  ---+E+------+E+------+E|
  1 +++     +E+-----+E+------+E+------+E+------+E+--   +++      +++       ++
    ++H+       +    +++   +  +++     ++++       +          +          +    |
  0 ++--H----H-+-----H----+----------+----------+----------+----------+---++
    0          10         20         30         40         50         60
                               Number of threads

                atomic_add-bench: 1000000 ops/thread, [0,2] range

  16 ++---------+----------+---------+----------+----------+----------+---++
     +cmpxchg +-E--+       +         +          +          +          +    |
  14 ++master +-H--+                                                      ++
     | |                                                                   |
  12 ++|                                                                  ++
     | E                                                                   |
  10 ++|                                                                  ++
     | |                                                                   |
   8 ++++                                                                 ++
     |E+|                                                                  |
     |  |                                                                  |
   6 ++ |                                                                 ++
     |   |                                                                 |
   4 ++  |                                                                ++
     |  +E+---       +++      +++              +++           ---+E+------+E|
   2 +H+     +E+------E-------+E+-----+E+------+E+------+E+--            +++
     + |        +    +++   +         ++++       +          +          +    |
   0 ++H-H----H-+-----H----+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

               atomic_add-bench: 1000000 ops/thread, [0,128] range

  70 ++---------+----------+---------+----------+----------+----------+---++
     +cmpxchg +-E--+       +         +          +       ++++          +    |
  60 ++master +-H--+                                 ----E------+E+-------++
     |                                        -+E+---   +++     +++      +E|
     |                                +++ ---- +++                       ++|
  50 ++                       +++  ---+E+-                                ++
     |                        -E---                                        |
  40 ++                    ---+++                                         ++
     |               +++---                                                |
     |              -+E+                                                   |
  30 ++      +++----                                                      ++
     |       +E+                                                           |
  20 ++ +++--                                                             ++
     |  +E+                                                                |
     |+E+                                                                  |
  10 +E+                                                                  ++
     +          +          +         +          +          +          +    |
   0 +HH-H----H-+-----H----+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

              atomic_add-bench: 1000000 ops/thread, [0,1024] range

  120 ++---------+---------+----------+---------+----------+----------+---++
      +cmpxchg +-E--+      +          +         +          +          +    |
      | master +-H--+                                                    ++|
  100 ++                                                              ----E+
      |                                                 +++  ---+E+---   ++|
      |                                                --E---   +++        |
   80 ++                                           ---- +++               ++
      |                                     ---+E+-                        |
   60 ++                              -+E+--                              ++
      |                       +++ ---- +++                                 |
      |                      -+E+-                                         |
   40 ++              +++----                                             ++
      |      +++   ---+E+                                                  |
      |     -+E+---                                                        |
   20 ++ +E+                                                              ++
      |+E+++                                                               |
      +E+        +         +          +         +          +          +    |
    0 +HH-H---H--+-----H---+----------+---------+----------+----------+---++
      0          10        20         30        40         50         60
                                Number of threads

[rth: Enforce alignment for ldrexd.]

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-23-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Richard Henderson
7f5616f538 target-arm: Rearrange aa32 load and store functions
Stop specializing on TARGET_LONG_BITS == 32; unconditionally allocate
a temp and expand with tcg_gen_extu_i32_tl.  Split out gen_aa32_addr,
gen_aa32_frob64, gen_aa32_ld_i32 and gen_aa32_st_i32 as separate interfaces.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:02 -07:00
Emilio G. Cota
070e3edcea tests: add atomic_add-bench
With this microbenchmark we can measure the overhead of emulating atomic
instructions with a configurable degree of contention.

The benchmark spawns $n threads, each performing $o atomic ops (additions)
in a loop. Each atomic operation is performed on a different cache line
(assuming lines are 64b long) that is randomly selected from a range [0, $r).

[ Note: each $foo corresponds to a -foo flag ]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1467054136-10430-20-git-send-email-cota@braap.org>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
37b995f6e7 target-i386: remove helper_lock()
It's been superseded by the atomic helpers.

The use of the atomic helpers provides a significant performance and scalability
improvement. Below is the result of running the atomic_add-test microbenchmark with:
 $ x86_64-linux-user/qemu-x86_64 tests/atomic_add-bench -o 5000000 -r $r -n $n
, where $n is the number of threads and $r is the allowed range for the additions.

The scenarios measured are:
- atomic: implements x86' ADDL with the atomic_add helper (i.e. this patchset)
- cmpxchg: implement x86' ADDL with a TCG loop using the cmpxchg helper
- master: before this patchset

Results sorted in ascending range, i.e. descending degree of contention.
Y axis is Throughput in Mops/s. Tests are run on an AMD machine with 64
Opteron 6376 cores.

                atomic_add-bench: 5000000 ops/thread, [0,1] range

  25 ++---------+----------+---------+----------+----------+----------+---++
     + atomic +-E--+       +         +          +          +          +    |
     |cmpxchg +-H--+                                                       |
  20 +Emaster +-N--+                                                      ++
     ||                                                                    |
     |++                                                                   |
     ||                                                                    |
  15 +++                                                                  ++
     |N|                                                                   |
     |+|                                                                   |
  10 ++|                                                                  ++
     |+|+                                                                  |
     | |    -+E+------        +++  ---+E+------+E+------+E+-----+E+------+E|
     |+E+E+- +++     +E+------+E+--                                        |
   5 ++|+                                                                 ++
     |+N+H+---                                 +++                         |
     ++++N+--+H++----+++   +  +++  --++H+------+H+------+H++----+H+---+--- |
   0 ++---------+-----H----+---H-----+----------+----------+----------+---H+
     0          10         20        30         40         50         60
                                Number of threads

                atomic_add-bench: 5000000 ops/thread, [0,2] range

  25 ++---------+----------+---------+----------+----------+----------+---++
     ++atomic +-E--+       +         +          +          +          +    |
     |cmpxchg +-H--+                                                       |
  20 ++master +-N--+                                                      ++
     |E|                                                                   |
     |++                                                                   |
     ||E                                                                   |
  15 ++|                                                                  ++
     |N||                                                                  |
     |+||                                   ---+E+------+E+-----+E+------+E|
  10 ++| |        ---+E+------+E+-----+E+---                    +++      +++
     ||H+E+--+E+--                                                         |
     |+++++                                                                |
     | ||                                                                  |
   5 ++|+H+--                                  +++                        ++
     |+N+    -                              ---+H+------+H+------          |
     +  +N+--+H++----+H+---+--+H+----++H+---    +          +    +H+---+--+H|
   0 ++---------+----------+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

                atomic_add-bench: 5000000 ops/thread, [0,8] range

  40 ++---------+----------+---------+----------+----------+----------+---++
     ++atomic +-E--+       +         +          +          +          +    |
  35 +cmpxchg +-H--+                                                      ++
     | master +-N--+               ---+E+------+E+------+E+-----+E+------+E|
  30 ++|                   ---+E+--   +++                                 ++
     | |            -+E+---                                                |
  25 ++E        ---- +++                                                  ++
     |+++++ -+E+                                                           |
  20 +E+ E-- +++                                                          ++
     |H|+++                                                                |
     |+|                                       +H+-------                  |
  15 ++H+                                   ---+++      +H+------         ++
     |N++H+--                         +++---                    +H+------++|
  10 ++ +++  -       +++           ---+H+                       +++      +H+
     | |     +H+-----+H+------+H+--                                        |
   5 ++|                      +++                                         ++
     ++N+N+--+N++          +         +          +          +          +    |
   0 ++---------+----------+---------+----------+----------+----------+---++
     0          10         20        30         40         50         60
                                Number of threads

               atomic_add-bench: 5000000 ops/thread, [0,128] range

  160 ++---------+---------+----------+---------+----------+----------+---++
      + atomic +-E--+      +          +         +          +          +    |
  140 +cmpxchg +-H--+                          +++      +++               ++
      | master +-N--+                           E--------E------+E+------++|
  120 ++                                      --|        |      +++       E+
      |                                     -- +++      +++              ++|
  100 ++                                   -                              ++
      |                                +++-                     +++      ++|
   80 ++                              -+E+    -+H+------+H+------H--------++
      |                           ----    ----                  +++       H|
      |            ---+E+-----+E+-  ---+H+                               ++|
   60 ++     +E+---   +++  ---+H+---                                      ++
      |    --+++   ---+H+--                                                |
   40 ++ +E+-+H+---                                                       ++
      |  +H+                                                               |
   20 +EE+                                                                ++
      +N+        +         +          +         +          +          +    |
    0 ++N-N---N--+---------+----------+---------+----------+----------+---++
      0          10        20         30        40         50         60
                                Number of threads

              atomic_add-bench: 5000000 ops/thread, [0,1024] range

  350 ++---------+---------+----------+---------+----------+----------+---++
      + atomic +-E--+      +          +         +          +          +    |
  300 +cmpxchg +-H--+                                                    +++
      | master +-N--+                                           +++       ||
      |                                                 +++      |    ----E|
  250 ++                                                 |   ----E----    ++
      |                                              ----E---    |    ---+H|
  200 ++                                      -+E+---   +++  ---+H+---    ++
      |                                   ----         -+H+--              |
      |                                +E+     +++ ---- +++                |
  150 ++                            ---+++  ---+H+-                       ++
      |                          ---  -+H+--                               |
  100 ++                   ---+E+ ---- +++                                ++
      |      +++   ---+E+-----+H+-                                         |
      |     -+E+------+H+--                                                |
   50 ++ +E+                                                              ++
      +EE+       +         +          +         +          +          +    |
    0 ++N-N---N--+---------+----------+---------+----------+----------+---++
      0          10        20         30        40         50         60
                                Number of threads

  hi-res: http://imgur.com/a/fMRmq

For master I stopped measuring master after 8 threads, because there is little
point in measuring the well-known performance collapse of a contended lock.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-21-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
ea97ebe89f target-i386: emulate XCHG using atomic helper
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-19-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
cfe819d309 target-i386: emulate LOCK'ed BTX ops using atomic helpers
[rth: Avoid redundant qemu_ld in locked case.  Fix previously unnoticed
incorrect zero-extension of address in register-offset case.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-18-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
f53b01817f target-i386: emulate LOCK'ed XADD using atomic helper
[rth: Move load of reg value to common location.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-17-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
8eb8c73856 target-i386: emulate LOCK'ed NEG using cmpxchg helper
[rth: Move redundant qemu_load out of cmpxchg loop.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-16-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
2a5fe8ae14 target-i386: emulate LOCK'ed NOT using atomic helper
[rth: Avoid qemu_load that's redundant with the atomic op.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
Emilio G. Cota
60e573462f target-i386: emulate LOCK'ed INC using atomic helper
[rth: Merge gen_inc_locked back into gen_inc to share cc update.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-14-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00